| ReGraphX: NoC-enabled 3D Heterogeneous ReRAM Architecture for Training Graph Neural Networks AI Arka, BK Joardar, JR Doppa, PP Pande, K Chakrabarty Design, Automation and Test in Europe Conference (DATE 2021), 2021 | 30 | 2021 |
| Performance and Accuracy Tradeoffs for Training Graph Neural Networks on ReRAM-Based Architectures AI Arka, BK Joarder, JR Doppa, P Pande, K Chakrabarty IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021 | 20 | 2021 |
| Simulations of threshold logic unit problems using memristor based synapses and CMOS neuron A Chowdhury, A Ayman, S Dey, M Sarkar, AI Arka 2017 3rd International Conference on Electrical Information and …, 2017 | 15 | 2017 |
| DARe: DropLayer-aware manycore ReRAM architecture for training graph neural networks AI Arka, BK Joardar, JR Doppa, PP Pande, K Chakrabarty 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | 13 | 2021 |
| HeM3D: Heterogeneous Manycore Architecture Based on Monolithic 3D Vertical Integration AI Arka, BK Joarder, RG Kim, DH Kim, JR Doppa, P Pande ACM Transactions on Design Automation of Electronic Systems, 2020 | 11 | 2020 |
| Accelerating large-scale graph neural network training on crossbar diet C Ogbogu, AI Arka, BK Joardar, JR Doppa, H Li, K Chakrabarty, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 10 | 2022 |
| Making a Case for Partially Connected 3D NoC: NFIC versus TSV AI Arka, S Gopal, JR Doppa, D Heo, P Pande ACM Journal on Emerging Technologies in Computing Systems (JETC), 2020 | 9 | 2020 |
| 3D++: Unlocking the Next Generation of High-Performance and Energy-Efficient Architectures using M3D Integration BK Joardar, AI Arka, JR Doppa, PP Pande 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2021 | 8 | 2021 |
| Heterogeneous manycore architectures enabled by processing-in-memory for deep learning: From cnns to gnns:(iccad special session paper) BK Joardar, AI Arka, JR Doppa, PP Pande, H Li, K Chakrabarty 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-7, 2021 | 5 | 2021 |
| A new supervised learning approach for visual pattern recognition using discrete circuit elements and memristor array M Sarkar, A Chowdhury, AI Arka, ABMH Rashid TENCON 2017-2017 IEEE Region 10 Conference, 223-228, 2017 | 5 | 2017 |
| Associative memory algorithm for visual pattern recognition with memristor array and cmos neuron A Chowdhury, M Sarkar, AI Arka, ABMH Rashid 2016 9th International Conference on Electrical and Computer Engineering …, 2016 | 5 | 2016 |
| Accelerating Graph Neural Network Training on ReRAM-Based PIM Architectures via Graph and Model Pruning CO Ogbogu, AI Arka, L Pfromm, BK Joardar, JR Doppa, K Chakrabarty, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | | 2022 |
| Fault-tolerant Deep Learning using Regularization BK Joardar, AI Arka, JR Doppa, PP Pande Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022 | | 2022 |
| Hardware Accelerators for Machine Learning: From 3D Manycore to Processing-in-Memory Architectures AI Arka Washington State University, 2022 | | 2022 |
| The thesis entitled “Neuromorphic System And Supervised Learning Tech-nique For Visual Pattern Recognition With Memristor Array And CMOS Neuron” by Aqeeb Iqbal Arka (1006017 … ABMH Rashid | | |
Partha PandeWashington State UniversityVerified email at wsu.edu
