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Avinash Lingamneni
Avinash Lingamneni
ML Hardware Architect @ Google
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Novel architectures for high-speed and low-power 3-2, 4-2 and 5-2 compressors
S Veeramachaneni, KM Krishna, L Avinash, SR Puppala, MB Srinivas
VLSI Design, 2007. Held jointly with 6th International Conference on ¡¦, 2007
1812007
Leveraging the error resilience of machine-learning applications for designing highly energy efficient accelerators
Z Du, A Lingamneni, Y Chen, K Palem, O Temam, C Wu
Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific ¡¦, 2014
1432014
Energy parsimonious circuit design through probabilistic pruning
A Lingamneni, C Enz, JL Nagel, K Palem, C Piguet
2011 Design, Automation & Test in Europe, 1-6, 2011
1432011
Ten years of building broken chips: The physics and engineering of inexact computing
K Palem, A Lingamneni
ACM Transactions on Embedded Computing Systems (TECS) 12 (2s), 1-23, 2013
1212013
Highly energy and performance efficient embedded computing through approximately correct arithmetic: A mathematical foundation and preliminary experimental validation
LNB Chakrapani, KK Muntimadugu, A Lingamneni, J George, KV Palem
Proceedings of the 2008 international conference on Compilers, architectures ¡¦, 2008
1162008
Sustaining moore's law in embedded computing through probabilistic and approximate design: retrospects and prospects
KV Palem, LNB Chakrapani, ZM Kedem, A Lingamneni, KK Muntimadugu
Proceedings of the 2009 international conference on Compilers, architecture ¡¦, 2009
952009
Synthesizing parsimonious inexact circuits through probabilistic design techniques
A Lingamneni, C Enz, K Palem, C Piguet
ACM Transactions on Embedded Computing Systems (TECS) 12 (2s), 1-26, 2013
682013
What to do about the end of Moore's law, probably!
K Palem, A Lingamneni
Proceedings of the 49th Annual Design Automation Conference, 924-929, 2012
612012
Algorithmic methodologies for ultra-efficient inexact architectures for sustaining technology scaling
A Lingamneni, KK Muntimadugu, C Enz, RM Karp, KV Palem, C Piguet
Proceedings of the 9th Conference on Computing Frontiers, 3-12, 2012
602012
Leveraging the error resilience of neural networks for designing highly energy efficient accelerators
Z Du, A Lingamneni, Y Chen, KV Palem, O Temam, C Wu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and ¡¦, 2015
572015
On the use of inexact, pruned hardware in atmospheric modelling
PD Düben, J Joven, A Lingamneni, H McNamara, G De Micheli, ...
Philosophical Transactions of the Royal Society A: Mathematical, Physical ¡¦, 2014
502014
Novel architectures for efficient (m, n) parallel counters
S Veeramachaneni, A Lingamneni, MK Krishna, MB Srinivas
Proceedings of the 17th ACM Great Lakes symposium on VLSI, 188-191, 2007
372007
Novel, high-speed 16-digit BCD adders conforming to IEEE 754r format
S Veeramachaneni, MK Krishna, L Avinash, S Reddy, MB Srinivas
IEEE Computer Society Annual Symposium on VLSI (ISVLSI'07), 343-350, 2007
262007
Improving energy gains of inexact DSP hardware through reciprocative error compensation
A Lingamneni, A Basu, C Enz, KV Palem, C Piguet
Proceedings of the 50th Annual Design Automation Conference, 1-8, 2013
242013
Innovation for sustainability in information and communication technologies (ICT)
C Bronk, A Lingamneni, K Palem
James A Baker III Institute for Public Policy Rice University, 2010
232010
Efficient design of 32-bit comparator using carry look-ahead logic
S Veeramachaneni, MK Krishna, L Avinash, RP Sreekanth, MB Srinivas
2007 IEEE Northeast Workshop on Circuits and Systems, 867-870, 2007
222007
Parsimonious Circuits for Error-Tolerant Applications through Probabilistic Logic Minimization
A Lingamneni, C Enz, K Palem, C Piguet
Integrated Circuit and System Design. Power and Timing Modeling ¡¦, 2011
212011
Designing energy-efficient arithmetic operators using inexact computing
A Lingamneni, C Enz, K Palem, C Piguet
Journal of Low Power Electronics 9 (1), 141-153, 2013
192013
Highly energy-efficient and quality-tunable inexact FFT accelerators
A Lingamneni, C Enz, K Palem, C Piguet
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 1-4, 2014
182014
A novel high-speed binary and gray incrementer/decrementer for an address generation unit
S Veeramachaneni, L Avinash, MB Srinivas
2007 International Conference on Industrial and Information Systems, 427-430, 2007
162007
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