| Ambient intelligence: impact on embedded system design T Basten, M Geilen, H De Groot Springer Science & Business Media, 2007 | 75 | 2007 |
| Method and apparatus for an adaptive systolic array structure TA Chirila-Rus, WC Chung US Patent 8,184,696, 2012 | 42 | 2012 |
| A scalable, multi-stream MPEG-4 video decoder for conferencing and surveillance applications P Schumacher, K Denolf, A Chilira-Rus, R Turney, N Fedele, K Vissers, ... IEEE International Conference on Image Processing 2005 2, II-886, 2005 | 17 | 2005 |
| Memory efficient design of an MPEG-4 video encoder for FPGAs K Denolf, A Chirila-Rus, R Turney, P Schumacher, K Vissers International Conference on Field Programmable Logic and Applications, 2005 …, 2005 | 13 | 2005 |
| A systematic approach to design low-power video codec cores K Denolf, A Chirila-Rus, P Schumacher, R Turney, K Vissers, D Verkest, ... EURASIP Journal on Embedded Systems 2007, 1-14, 2007 | 12 | 2007 |
| A virtual socket framework for rapid emulation of video and multimedia designs P Schumacher, M Mattavelli, A Chirila-Rus, R Turney 2005 IEEE International Conference on Multimedia and Expo, 872-875, 2005 | 11 | 2005 |
| Low-power MPEG-4 video encoder design K Denolf, A Chirila-Rus, D Verkest IEEE Workshop on Signal Processing Systems Design and Implementation, 2005 …, 2005 | 10 | 2005 |
| A software/hardware platform for rapid prototyping of video and multimedia designs P Schumacher, M Mattavelli, A Chirila-Rus, R Turney Fifth International Workshop on System-on-Chip for Real-Time Applications …, 2005 | 9 | 2005 |
| A systematic design of an MPEG-4 video encoder and decoder for FPGAs K Denolf, K Vissers, P Schumacher, R Turney, N Jachimiec, A Chirila-Rus, ... | 9 | 2004 |
| Communication primitives driven hardware design and test methodology applied on complex video applications A Chirila-Rus, K Denolf, B Vanhoof, P Schumacher, K Vissers 16th IEEE International Workshop on Rapid System Prototyping (RSP'05), 246-248, 2005 | 6 | 2005 |
| Determining sum of absolute differences in parallel TA Chirila-Rus US Patent 8,131,788, 2012 | 5 | 2012 |
| An Efficent Variable Block Size Selection Scheme for the H. 264 Motion Estimation I Amer, A Chirila-Rus, W Badawy, G Jullien 2006 6th International Workshop on System on Chip for Real Time Applications …, 2006 | 4 | 2006 |
| The FlexWave-ll: a wavelet-based compression engine B Vanhoof, A Chirila-Rus, B Masschelein, R Osorio European Space Components Conference, ESCCON 2002 507, 301, 2002 | 4 | 2002 |
| Using System Generator for Systematic HDL Design, Verification, and Validation J Delva, A Chirila-Rus, B Chan, S Seng White Paper: Xilinx System Generator, 2008 | 3 | 2008 |
| Data structure and method using same for encoding video information I Amer, TA Chirila-Rus, RD Turney, WC Chung, W Badawy US Patent 8,116,372, 2012 | 2 | 2012 |
| Systematic development and test methodology for complex multimedia applications A Chirila-Rus, K Denolf, R Turney, P Schumacher | 1 | 2005 |
| Implementation of a scalable wavelet MPEG-4 compression system AT Chirila-Rus, B Vanhoof | 1 | 2001 |
| Efficient Variable Block Size Selection for AVC Low Bitrate Applications I Amer, G Jullien, W Badawy, A Chirila-Rus, R Turney, R Hamed International Journal on Advances in Telecommunications Volume 3, Number 1 …, 2010 | | 2010 |
| Scalable FPGA design for MPEG-4 codec applications K Denolf, A Chirila-Rus, R Turney, P Schumacher | | 2005 |
| Systematic Development and Test Methodology for Complex Multimedia Applications PS Adrian Chirila-Rus, Kristof Denolf, Robert Turney Expo GSPx 2005, 2005 | | 2005 |
Twan BastenProfessor of Computational Models, Electrical Engineering, Eindhoven University of TechnologyVerified email at tue.nl
