| A 30-Gb/s 1.37-pJ/b CMOS receiver for optical interconnects Q Pan, Y Wang, Z Hou, L Sun, Y Lu, WH Ki, P Chiang, CP Yue Journal of Lightwave Technology 33 (4), 778-786, 2014 | 26 | 2014 |
| A 41-mW 30-Gb/s CMOS optical receiver with digitally-tunable cascaded equalization Q Pan, Y Wang, Z Hou, L Sun, L Wu, WH Ki, P Chiang, CP Yue ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC), 127-130, 2014 | 15 | 2014 |
| Switch capacitor decision feedback equalizer with internal charge summation L Sun, X Kong, Z Zhu, M Li, D Ren US Patent 9,722,828, 2017 | 14 | 2017 |
| A 25Gbps, 2x-oversampling CDR using a zero-crossing linearizing phase detector Z Wang, R Bai, J Wang, X Jing, Q Nan, L Sun, CP Yue, Z Hong, ... 2014 IEEE Radio Frequency Integrated Circuits Symposium, 271-274, 2014 | 12 | 2014 |
| A 26–28-Gb/s Full-Rate Clock and Data Recovery Circuit With Embedded Equalizer in 65-nm CMOS L Sun, Q Pan, KC Wang, CP Yue IEEE Transactions on Circuits and Systems I: Regular Papers 61 (7), 2139 - 2149, 2014 | 11 | 2014 |
| A smartphone SP10T T/R switch in 180-nm SOI CMOS with 8kV+ ESD protection by co-design XS Wang, X Wang, F Lu, L Wang, R Ma, Z Dong, L Sun, A Wang, CP Yue, ... Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 1-4, 2013 | 11 | 2013 |
| Common-gate amplifier for high-speed DC-coupling communications M Li, L Sun, Z Zhu US Patent 9,438,188, 2016 | 10 | 2016 |
| Analog/Mixed-Signal Design in FinFET Technologies ALS Loke, E Terzioglu, AA Kumar, TT Wee, K Rim, D Yang, B Yu, L Ge, ... Hybrid ADCs, Smart Sensors for the IoT, and Sub-1V & Advanced Node Analog …, 2017 | 7 | 2017 |
| PULSE-WIDTH MODULATION DATA DECODER Z Zhu, X Kong, L Sun, J Xu US Patent 9203391 B2, 2015 | 7 | 2015 |
| Multi-mode phase-frequency detector for clock and data recovery L Sun, Z Zhu, M Li, X Kong US Patent 9,485,082, 2016 | 4 | 2016 |
| High-speed sense amplifier with a dynamically cross-coupled regeneration stage TM Rasmus, L Sun, D Ren US Patent 11,095,273, 2021 | 3 | 2021 |
| Systems and methods for reduction of in-phase and quadrature-phase (IQ) clock skew M Li, L Sun, D Ren US Patent 10,972,108, 2021 | 3 | 2021 |
| Clock data recovery with non-uniform clock tracking Y Song, Z Zhu, M Li, L Sun, D Song, CH Chang US Patent 10,084,621, 2018 | 3 | 2018 |
| 25 Gb/s VCSEL driver with pulse equalization technique J Wang, L Sun, Z Wang, N Qi, PY Chiang, Z Hong 2014 Optical Interconnects Conference, 55-56, 2014 | 3 | 2014 |
| Circuits and methods for maintaining gain for a continuous-time linear equalizer M Li, L Sun, H Liu US Patent 11,469,730, 2022 | 2 | 2022 |
| Variable gain amplifier with embedded equalization for uniform tuning L Sun, D Ren, H Liu, S Chowdary US Patent 10,992,277, 2021 | 2 | 2021 |
| Linearity of Phase Interpolators by Combining Current Coding and Size Coding L Sun, Z Zhu, X Kong, KL Arcudia, Z Chen, Q INCORPORATED US Patent US 9485084 B2, 2015 | 2 | 2015 |
| A 25–28Gbps clock and data recovery system with embedded equalization in 65-nm CMOS L Sun, A Pan, KC Wang, CP Yue 2012 IEEE 11th International Conference on Solid-State and Integrated …, 2012 | 2 | 2012 |
| Efficient clock forwarding scheme L Sun, R Deans, Z Chen, Z Zhu US Patent 10,698,439, 2020 | 1 | 2020 |
| Receiver with Cancellation of Intrinsic Offset from Decision Feedback Equalization to Enhance Data Margin M Chen, L Sun, CH Chang, H Goudarzi, R Deans US Patent 10,505,705, 2019 | 1 | 2019 |
C. Patrick Yue, PhD, IEEE Fellow, Opti...Professor of ECE & Director of HKUST IC Design Center (ICDC) & Optical Wireless Lab (OWL)Verified email at ust.hk
