Yao Wang
Yao Wang
Verified email at cornell.edu - Homepage
Title
Cited by
Cited by
Year
A Hardware Design Language for Timing-Sensitive Information-Flow Security
D Zhang, Y Wang, GE Suh, A Myers
ASPLOS, 2015
1522015
Efficient Timing Channel Protection for On-Chip Networks
Y Wang, GE Suh
NOCS, 2012
972012
Timing Channel Protection for a shared Memory controller
Y Wang, A Ferraiuolo, GE Suh
HPCA, 2014
872014
SecDCP: Secure Dynamic Cache Partitioning for Efficient Timing Channel Protection
Y Wang, A Ferraiuolo, D Zhang, AC Myers, GE Suh
DAC, 2016
572016
Lattice Priority Scheduling: Low-Overhead Timing Channel Protection for a Shared Memory Controller
A Ferraiuolo, Y Wang, D Zhang, AC Myers, GE Suh
HPCA, 2016
192016
Secure Dynamic Memory Scheduling against Timing Channel Attacks
Y Wang, B Wu, GE Suh
HPCA, 2017
102017
A hardware design language for efficient control of timing channels
D Zhang, Y Wang, GE Suh, AC Myers
72014
Full-Processor Timing Channel Protection with Applications to Secure Hardware Compartments
A Ferraiuolo, Y Wang, R Xu, D Zhang, A Myers, E Suh
42015
Quadrisection-Based Task Mapping on Many-Core Processors for Energy-Efficient On-Chip Communication
N Michael, Y Wang, GE Suh, A Tang
NOCS, 2013
32013
Performance Evaluation of On-Chip Sensor Network (SENoC) in MPSoC
Y Wang, Y Wang, J Xu, H Yang
International Conference on Green Circuits and Systems (ICGCS), 2010
32010
Efficient and verifiable timing channel protection for multi-core processors
Y Wang
Cornell University, 2017
2017
The system can't perform the operation now. Try again later.
Articles 1–11