Mark D. Hill
Mark D. Hill
Professor of Computer Sciences and ECE, University of Wisconsin-Madison
cs.wisc.edu의 이메일 확인됨 - 홈페이지
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The gem5 simulator
N Binkert, B Beckmann, G Black, SK Reinhardt, A Saidi, A Basu, ...
ACM SIGARCH computer architecture news 39 (2), 1-7, 2011
43572011
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset
MMK Martin, DJ Sorin, BM Beckmann, MR Marty, M Xu, AR Alameldeen, ...
ACM SIGARCH Computer Architecture News 33 (4), 92-99, 2005
20052005
Amdahl's law in the multicore era
MD Hill, MR Marty
Computer 41 (7), 33-38, 2008
16952008
LogTM: Log-based transactional memory
KE Moore, J Bobba, MJ Moravan, MD Hill, DA Wood
The Twelfth International Symposium on High-Performance Computer …, 2006
9212006
Weak ordering—a new definition
SV Adve, MD Hill
ACM SIGARCH Computer Architecture News 18 (2SI), 2-14, 1990
9021990
Evaluating associativity in CPU caches
MD Hill, AJ Smith
IEEE Transactions on Computers 38 (12), 1612-1630, 1989
7961989
DBMSs on a modern processor: Where does time go?
A Ailamaki, DJ DeWitt, MD Hill, DA Wood
VLDB'99, Proceedings of 25th International Conference on Very Large Data …, 1999
7001999
Weaving Relations for Cache Performance.
A Ailamaki, DJ DeWitt, MD Hill, M Skounakis
VLDB 1, 169-180, 2001
5142001
A" flight data recorder" for enabling full-system multiprocessor deterministic replay
M Xu, R Bodik, MD Hill
Proceedings of the 30th annual international symposium on Computer …, 2003
4942003
The wisconsin wind tunnel: Virtual prototyping of parallel computers
SK Reinhardt, MD Hill, JR Larus, AR Lebeck, JC Lewis, DA Wood
Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and …, 1993
4791993
Cache-conscious structure layout
TM Chilimbi, MD Hill, JR Larus
Proceedings of the ACM SIGPLAN 1999 conference on Programming language …, 1999
4611999
LogTM-SE: Decoupling hardware transactional memory from caches
L Yen, J Bobba, MR Marty, KE Moore, H Volos, MD Hill, MM Swift, ...
2007 IEEE 13th International Symposium on High Performance Computer …, 2007
4432007
A primer on memory consistency and cache coherence
DJ Sorin, MD Hill, DA Wood
Synthesis lectures on computer architecture 6 (3), 1-212, 2011
4282011
SafetyNet: Improving the availability of shared memory multiprocessors with global checkpoint/recovery
DJ Sorin, MMK Martin, MD Hill, DA Wood
Proceedings 29th Annual International Symposium on Computer Architecture …, 2002
4132002
Token coherence: Decoupling performance and correctness
MMK Martin, MD Hill, DA Wood
ACM SIGARCH Computer Architecture News 31 (2), 182-193, 2003
3722003
A case for direct-mapped caches
MD Hill
Computer 21 (12), 25-40, 1988
3481988
Aspects of cache memory and instruction buffer performance
MD Hill
CALIFORNIA UNIV BERKELEY DEPT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCES, 1987
3391987
Page placement algorithms for large real-indexed caches
RE Kessler, MD Hill
ACM Transactions on Computer Systems (TOCS) 10 (4), 338-359, 1992
3361992
Why on-chip cache coherence is here to stay
MMK Martin, MD Hill, DJ Sorin
Communications of the ACM 55 (7), 78-89, 2012
3172012
Performance pathologies in hardware transactional memory
J Bobba, KE Moore, H Volos, L Yen, MD Hill, MM Swift, DA Wood
ACM SIGARCH Computer Architecture News 35 (2), 81-91, 2007
3122007
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