Multi retention level STT-RAM cache designs with a dynamic refresh scheme Z Sun, X Bi, H Li, WF Wong, ZL Ong, X Zhu, W Wu proceedings of the 44th annual IEEE/ACM international symposium on …, 2011 | 289 | 2011 |
Cross-Layer Racetrack Memory Design for Ultra High Density and Low Power Consumption Z Sun, W Wu, H Li Design Automation Conference (DAC), 2013 50th ACM / EDAC / IEEE, 2013 | 122 | 2013 |
Probabilistic design methodology to improve run-time stability and performance of STT-RAM caches X Bi, Z Sun, H Li, W Wu Proceedings of the International Conference on Computer-Aided Design, 88-94, 2012 | 86 | 2012 |
Access scheme of multi-level cell spin-transfer torque random access memory and its optimization Y Chen, X Wang, W Zhu, H Li, Z Sun, G Sun, Y Xie 2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 1109 …, 2010 | 82 | 2010 |
A coherent hybrid SRAM and STT-RAM L1 cache architecture for shared memory multicores J Wang, Y Tim, WF Wong, ZL Ong, Z Sun, HH Li 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), 610-615, 2014 | 56 | 2014 |
Process variation aware data management for STT-RAM cache design Z Sun, X Bi, H Li Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012 | 56 | 2012 |
Read performance: The newest barrier in scaled STT-RAM Y Zhang, Y Li, Z Sun, H Li, Y Chen, AK Jones IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (6 …, 2014 | 55 | 2014 |
STT-RAM cache hierarchy with multiretention MTJ designs Z Sun, X Bi, H Li, WF Wong, X Zhu IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (6 …, 2013 | 53 | 2013 |
Xiuyuan Bi, Hai Helen Li, Weng-Fai Wong, Zhong-Liang Ong, Xiaochun Zhu, and Wenqing Wu. Multi retention level stt-ram cache designs with a dynamic refresh scheme Z Sun Proceedings of the 44th Annual IEEE/ACM International Symposium on …, 2011 | 44 | 2011 |
Voltage driven nondestructive self-reference sensing scheme of spin-transfer torque memory Z Sun, H Li, Y Chen, X Wang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (11 …, 2011 | 43 | 2011 |
Array organization and data management exploration in racetrack memory Z Sun, X Bi, W Wu, S Yoo, H Li IEEE Transactions on Computers 65 (4), 1041-1054, 2014 | 34 | 2014 |
Design exploration of racetrack lower-level caches Z Sun, X Bi, AK Jones, H Li Proceedings of the 2014 international symposium on Low power electronics and …, 2014 | 33 | 2014 |
A dual-mode architecture for fast-switching STT-RAM Z Sun, H Li, W Wu Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012 | 30 | 2012 |
Variation tolerant sensing scheme of spin-transfer torque memory for yield improvement Z Sun, H Li, Y Chen, X Wang 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 432-437, 2010 | 29 | 2010 |
The application of spintronic devices in magnetic bio-sensing Y Chen, X Wang, Z Sun, H Li 2nd Asia Symposium on Quality Electronic Design (ASQED), 230-234, 2010 | 8 | 2010 |
Nonvolatile memories as the data storage system for implantable ECG recorder Z Sun, X Chen, Y Zhang, H Li, Y Chen ACM Journal on Emerging Technologies in Computing Systems (JETC) 8 (2), 1-16, 2012 | 7 | 2012 |
Spintronic Memristor as Interface Between DNA and Solid State Devices J Yang, Z Sun, X Wang, Y Chen, H Li IEEE Journal on Emerging and Selected Topics in Circuits and Systems 6 (2 …, 2016 | 4 | 2016 |
The experimental model of micro-cantilever switch and its optimization model FM Guo, YC Xiao, ZY Sun, ZS Lai 2010 IEEE 5th International Conference on Nano/Micro Engineered and …, 2010 | 4 | 2010 |
Magnetic tunneling junction non-volatile register with feedback for robust read and write operations Z Sun, RS Madala, SK Govindaswamy, KH Yuen, W Wu, P Wang US Patent 9,147,454, 2015 | 3 | 2015 |
MTJ Design Margin Exploration for Self-Reference Sensing Scheme Z Sun, X Wang, H Li Journal of Applied Physics (JAP), 111, 07C726, 2012 | 3* | 2012 |