| A Charge Recycling SAR ADC With a LSB-Down Switching Scheme L Sun, B Li, AKY Wong, WT Ng, KP Pun Circuits and Systems I: Regular Papers, IEEE Transactions on, 1-10, 2014 | 45 | 2014 |
| Analysis on capacitor mismatch and parasitic capacitors effect of improved segmented-capacitor array in SAR ADC L Sun, Q Dai, C Lee, G Qiao Intelligent Information Technology Application, 2009. IITA 2009. Third …, 2009 | 26 | 2009 |
| A High-Linearity Capacitance-to-Digital Converter Suppressing Charge Errors From Bottom-Plate Switches B Li, L Sun, CT Ko, AKY Wong, KP Pun Circuits and Systems I: Regular Papers, IEEE Transactions on 61 (7), 1928 - 1941, 2014 | 23 | 2014 |
| Optimizing the Stage Resolution in Pipelined SAR ADCs for High-Speed High-Resolution Applications L Sun, CT Ko, KP Pun Circuits and Systems II: Express Briefs, IEEE Transactions on 61 (7), 476 - 480, 2014 | 17 | 2014 |
| Unit capacitor array based SAR ADC KP Pun, L Sun, B Li Microelectronics Reliability 53 (3), 505-508, 2013 | 14 | 2013 |
| Analysis and Design of a 14-bit SAR ADC using self-calibration DAC L Sun, KP Pun, A Wong 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 1267-1270, 2012 | 6 | 2012 |
| Design considerations of calibration DAC in self-calibrated SAR A/D converters L Sun, KP Pun Microelectronics Journal 45 (1), 14-22, 2014 | 5 | 2014 |
| The analysis on the parasitic capacitors effect of the fully differential architecture of SAR ADC L Sun, QY Dai, CC Lee, GS Qiao Applied Mechanics and Materials 20, 342-345, 2010 | 2 | 2010 |
| Trends of lithography technology based on decreasing of the feature size L Sun, Q Dai, G Qiao, R Wu Micronanoelectronic Technology 46 (3), 186-190, 2009 | 2 | 2009 |
| Variation Aware Sleep Vector Selection in Dual Dynamic OR Circuits for Low Leakage Register File Design G Scotti, S Pennisi, P Monsurrò, A Trifiletti, B Li, L Sun, CT Ko, AKY Wong, ... IEEE Transactions on Circuits and Systems I: Regular Papers 61 (7), 2014 | 1 | 2014 |
| Low-offset comparator using capacitive self-calibration L Sun, KP Pun 2012 International SoC Design Conference (ISOCC), 412-414, 2012 | 1 | 2012 |
| 23 µW 8.9‐effective number of bit 1.1 MS/s successive approximation register analog‐to‐digital converter with an energy‐efficient digital‐to‐analog converter switching scheme L Sun, CT Ko, M Ho, WT Ng, KN Leung, CS Choy, KP Pun The Journal of Engineering 2014 (8), 420-425, 2014 | | 2014 |
| Capacitive digital‐to‐analogue converters with least significant bit down in differential successive approximation register ADCs L Sun, KP Pun, WT Ng The Journal of Engineering 2014 (1), 45-48, 2014 | | 2014 |
| 全二进制权电容的分段电容阵列 (Stepped capacitor array for a full binary weight capacitor) L Sun, GS Qiao, QY Dai, F Xie CN Patent CN101534115 A, 2009 | | 2009 |
| A Self-Calibration Technique Based on 16 Bit SAR ADCs G Qiao, Q Dai, L Sun, F Xie Micronanoelectronic Technology 10, 013, 2009 | | 2009 |
