| Hardware architecture of a digital piecewise linear chaotic map with perturbation for pseudorandom number generation VR Kopparthi, A Kali, SL Sabat, KK Anumandla, R Peesapati, ... AEU-International Journal of Electronics and Communications 147, 154138, 2022 | 17 | 2022 |
| System on chip implementation of low complex orthogonal matching pursuit algorithm on FPGA VR Kopparthi, R Peesapati, SL Sabat 2020 6th International Conference on Signal Processing and Communication …, 2020 | 9 | 2020 |
| An 8-bit integer true periodic orbit PRNG based on delayed Arnold’s cat map VBE Mebenga, VR Kopparthi, HD Nzeuga, JSAE Fouda, ... AEU-International Journal of Electronics and Communications 162, 154575, 2023 | 3 | 2023 |
| System on chip implementation of floating point matrix inversion using modified Gram-Schmidt based QR decomposition on PYNQ FPGA KVS Kumar, VR Kopparthi, SL Sabat, R Peesapati 2021 IEEE International Symposium on Smart Electronic Systems (iSES), 84-88, 2021 | 3 | 2021 |
| Hardware-Software Co-Design for Whitening using Zero-Phase Component Analysis KVS Kumar, VR Kopparthi, SL Sabat 2022 IEEE International Symposium on Smart Electronic Systems (iSES), 36-41, 2022 | | 2022 |
Samrat SabatProfessor,University of HyderabadVerified email at uohyd.ac.in
