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Nicholas P. Carter
Nicholas P. Carter
Verified email at g.harvard.edu
Title
Cited by
Cited by
Year
The m-machine multicomputer
M Fillo, SW Keckler, WJ Dally, NP Carter, A Chang, Y Gurevich, WS Lee
International Journal of Parallel Programming 25, 183-212, 1997
3201997
The m-machine multicomputer
M Fillo, SW Keckler, WJ Dally, NP Carter, A Chang, Y Gurevich, WS Lee
International Journal of Parallel Programming 25, 183-212, 1997
3201997
DeNovo: Rethinking the memory hierarchy for disciplined parallelism
B Choi, R Komuravelli, H Sung, R Smolinski, N Honarmand, SV Adve, ...
2011 International Conference on Parallel Architectures and Compilation …, 2011
2532011
Hardware support for fast capability-based addressing
NP Carter, SW Keckler, WJ Dally
ACM SIGOPS Operating Systems Review 28 (5), 319-327, 1994
1741994
Exploiting fine-grain thread level parallelism on the MIT multi-ALU processor
SW Keckler, WJ Dally, D Maskit, NP Carter, A Chang, WS Lee
ACM SIGARCH Computer Architecture News 26 (3), 306-317, 1998
1501998
Runnemede: An architecture for ubiquitous high-performance computing
NP Carter, A Agrawal, S Borkar, R Cledat, H David, D Dunning, J Fryman, ...
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
1392013
Memory system with global address translation
NP Carter, SW Keckler, WJ Dally
US Patent 6,003,123, 1999
1371999
Memory system including guarded pointers
NP Carter, SW Keckler, WJ Dally
US Patent 5,845,331, 1998
1111998
Design techniques for cross-layer resilience
NP Carter, H Naeimi, DS Gardner
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
962010
Vision for cross-layer optimization to address the dual challenges of energy and reliability
A DeHon, HM Quinn, NP Carter
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
702010
Comparing adaptive routing and dynamic voltage scaling for link power reduction
JM Stine, NP Carter, J Flich
IEEE Computer Architecture Letters 3 (1), 4-4, 2004
402004
An efficient, protected message interface
WS Lee, WJ Dally, SW Keckler, NP Carter, A Chang
Computer 31 (11), 69-75, 1998
381998
Error management across hardware and software layers
NP Carter, DS Gardner, EC Hannah, H Naeimi, SY Borkar, M Haycock
US Patent App. 13/036,826, 2012
352012
Exposing control of power and clock gating for software
NP Carter, JB Fryman, RC Knauerhase, AB Agrawal, J Torrellas
US Patent App. 13/630,738, 2014
322014
Clustered programmable-reconfigurable processors
DB Gottlieb, JJ Cook, JD Walstrom, S Ferrera, CW Wang, NP Carter
2002 IEEE International Conference on Field-Programmable Technology, 2002 …, 2002
292002
A combined Bayesian Markovian approach for behaviour recognition
N Carter, D Young, J Ferryman
18th International Conference on Pattern Recognition (ICPR'06) 1, 761-764, 2006
282006
Joining the dots: How does an apex predator move through an urbanizing landscape?
N Carter, R Cooke, JG White, DA Whisson, B Isaac, N Bradsworth
Global ecology and conservation 17, e00532, 2019
212019
Final report for CCC cross-layer reliability visioning study
A DeHon, N Carter, H Quinn
Computing Community Consortium, 2011
212011
Rack to rack optical communication
EC Hannah, JL Gustafson, SA Sud, NP Carter, JB Fryman, R Want
US Patent App. 12/974,524, 2012
202012
Architecture of a self-checkpointing microprocessor that incorporates nanomagnetic devices
L Kothari, NP Carter
IEEE Transactions on Computers 56 (2), 161-173, 2007
182007
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