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Jae Hur
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Vertically stacked thin triboelectric nanogenerator for wind energy harvesting
ML Seol, JH Woo, SB Jeon, D Kim, SJ Park, J Hur, YK Choi
Nano Energy 14, 201-208, 2015
2042015
Nature‐replicated nano‐in‐micro structures for triboelectric energy harvesting
ML Seol, JH Woo, DI Lee, H Im, J Hur, YK Choi
Small 10 (19), 3887-3894, 2014
1912014
First demonstration of a logic-process compatible junctionless ferroelectric FinFET synapse for neuromorphic applications
M Seo, MH Kang, SB Jeon, H Bae, J Hur, BC Jang, S Yun, S Cho, WK Kim, ...
IEEE Electron Device Letters 39 (9), 1445-1448, 2018
1522018
Comprehensive analysis of gate-induced drain leakage in vertically stacked nanowire FETs: Inversion-mode versus junctionless mode
J Hur, BH Lee, MH Kang, DC Ahn, T Bang, SB Jeon, YK Choi
IEEE Electron Device Letters 37 (5), 541-544, 2016
872016
A vertically integrated junctionless nanowire transistor
BH Lee, J Hur, MH Kang, T Bang, DC Ahn, D Lee, KH Kim, YK Choi
Nano letters 16 (3), 1840-1847, 2016
742016
Vertically integrated multiple nanowire field effect transistor
BH Lee, MH Kang, DC Ahn, JY Park, T Bang, SB Jeon, J Hur, D Lee, ...
Nano Letters 15 (12), 8056-8061, 2015
702015
Direct comparison of ferroelectric properties in Hf0.5Zr0.5O2 between thermal and plasma-enhanced atomic layer deposition
J Hur, N Tasneem, G Choe, P Wang, Z Wang, AI Khan, S Yu
Nanotechnology, 2020
612020
All‐Solid‐State Ion Synaptic Transistor for Wafer‐Scale Integration with Electrolyte of a Nanoscale Thickness
JM Yu, C Lee, DJ Kim, H Park, JK Han, J Hur, JK Kim, MS Kim, M Seo, ...
Advanced Functional Materials, 2010971, 2021
512021
A Recoverable Synapse Device Using a Three‐Dimensional Silicon Transistor
J Hur*, BC Jang*, J Park, DI Moon, H Bae, JY Park, GH Kim, SB Jeon, ...
Advanced Functional Materials 28 (47), 1804844, 2018
432018
Drain–erase scheme in ferroelectric field-effect transistor—Part I: Device characterization
P Wang, Z Wang, W Shim, J Hur, S Datta, AI Khan, S Yu
IEEE Transactions on Electron Devices 67 (3), 955-961, 2020
422020
Antiferroelectric negative capacitance from a structural phase transition in zirconia
M Hoffmann, Z Wang, N Tasneem, A Zubair, PV Ravindran, M Tian, ...
Nature communications 13 (1), 1228, 2022
412022
Design of non-volatile capacitive crossbar array for in-memory computing
YC Luo, A Lu, J Hur, S Li, S Yu
2021 IEEE International Memory Workshop (IMW), 1-4, 2021
382021
Drain-erase scheme in ferroelectric field effect transistor—Part II: 3-D-NAND architecture for in-memory computing
P Wang, W Shim, Z Wang, J Hur, S Datta, AI Khan, S Yu
IEEE Transactions on Electron Devices 67 (3), 962-967, 2020
382020
Ferroelectric HfO2-based synaptic devices: recent trends and prospects
S Yu, J Hur, YC Luo, W Shim, G Choe, P Wang
Semiconductor Science and Technology 36 (10), 104001, 2021
362021
Ferroelectric hafnium zirconium oxide compatible with back-end-of-line process
J Hur, YC Luo, N Tasneem, AI Khan, S Yu
IEEE Transactions on Electron Devices 68 (7), 3176-3180, 2021
352021
Nonvolatile Capacitive Crossbar Array for In‐Memory Computing
J Hur*, YC Luo*, A Lu, TH Wang, S Li, AI Khan, S Yu
Advanced Intelligent Systems, 2100258, 2022
322022
The impacts of ferroelectric and interfacial layer thicknesses on ferroelectric FET design
N Tasneem, MM Islam, Z Wang, H Chen, J Hur, D Triyoso, S Consiglio, ...
IEEE Electron Device Letters 42 (8), 1156-1159, 2021
282021
Investigating ferroelectric minor loop dynamics and history effect—Part I: Device characterization
P Wang, Z Wang, X Sun, J Hur, S Datta, AI Khan, S Yu
IEEE Transactions on Electron Devices 67 (9), 3592-3597, 2020
272020
A comparative study on hot-carrier injection in 5-story vertically integrated inversion-mode and junctionless-mode gate-all-around MOSFETs
SY Kim, BH Lee, J Hur, JY Park, SB Jeon, SW Lee, YK Choi
IEEE Electron Device Letters 39 (1), 4-7, 2017
272017
Non-volatile, small-signal capacitance in ferroelectric capacitors
YC Luo, J Hur, P Wang, AI Khan, S Yu
Applied Physics Letters 117 (7), 2020
262020
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Articles 1–20