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Karl Janson
Karl Janson
Early Stage Researcher, Tallinn University of Technology
Verified email at ttu.ee
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From online fault detection to fault management in Network-on-Chips: A ground-up approach
SP Azad, B Niazmand, K Janson, N George, AS Oyeniran, T Putkaradze, ...
2017 IEEE 20th International Symposium on Design and Diagnostics of …, 2017
222017
Software-level tmr approach for on-board data processing in space applications
K Janson, CJ Treudler, T Hollstein, J Raik, M Jenihhin, G Fey
2018 IEEE 21st International Symposium on Design and Diagnostics of …, 2018
42018
Comprehensive performance and robustness analysis of 2D turn models for network-on-chips
SP Azad, B Niazmand, K Janson, T Kogge, J Raik, G Jervan, T Hollstein
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
42017
Await: An ultra-lightweight soft-error mitigation mechanism for network-on-chip links
K Janson, R Pihlak, SP Azad, B Niazmand, G Jervan, J Raik
2018 13th International Symposium on Reconfigurable Communication-centric …, 2018
32018
Fault-aware performance assessment approach for embedded networks
J Malburg, K Janson, J Raik, F Dannemann
2019 IEEE 22nd International Symposium on Design and Diagnostics of …, 2019
22019
Handling of SETs on NoC links by exploitation of inherent redundancy in circular input buffers
K Janson, R Pihlak, SP Azad, B Niazmand, G Jervan, J Raik
2018 16th Biennial Baltic Electronics Conference (BEC), 1-4, 2018
22018
Techniques for Robust Routing, Communication and Computation in Multiprocessor Systems
K Janson
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