| A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ... Computer Architecture (ISCA), 2014 ACM/IEEE 41st International Symposium on …, 2014 | 1458 | 2014 |
| A cloud-scale acceleration architecture AM Caulfield, ES Chung, A Putnam, H Angepat, J Fowers, M Haselman, ... Microarchitecture (MICRO), 2016 49th Annual IEEE/ACM International Symposium …, 2016 | 799 | 2016 |
| Azure Accelerated Networking: SmartNICs in the Public Cloud D Firestone, A Putnam, S Mundkur, D Chiou, A Dabagh, M Andrewartha, ... 15th USENIX Symposium on Networked Systems Design and Implementation (NSDI …, 2018 | 619 | 2018 |
| KV-Direct: High-Performance In-Memory Key-Value Store with Programmable NIC B Li, Z Ruan, W Xiao, Y Lu, Y Xiong, A Putnam, E Chen, L Zhang Proceedings of the 26th Symposium on Operating Systems Principles, 137-152, 2017 | 257 | 2017 |
| The wavescalar architecture S Swanson, A Schwerin, M Mercaldi, A Petersen, A Putnam, K Michelson, ... ACM Transactions on Computer Systems (TOCS) 25 (2), 1-54, 2007 | 232 | 2007 |
| A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ... IEEE Micro 35 (3), 10-22, 2015 | 153 | 2015 |
| Implementing a multi-component service using plural hardware acceleration components SF Heil, AM Caulfield, DC Burger, AR Putnam, ES Chung US Patent 10,296,392, 2019 | 150* | 2019 |
| Building a wavecache SJ Eggers, MA Mercaldi, KA Michelson, MH Oskin, AK Petersen, ... US Patent 7,490,218, 2009 | 129 | 2009 |
| Building a wavecache SJ Eggers, MA Mercaldi, KA Michelson, MH Oskin, AK Petersen, ... US Patent 7,490,218, 2009 | 129 | 2009 |
| Building a wavecache SJ Eggers, MA Mercaldi, KA Michelson, MH Oskin, AK Petersen, ... US Patent 7,490,218, 2009 | 129 | 2009 |
| CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures A Putnam, D Bennett, E Dellinger, J Mason, P Sundararajan, S Eggers 2008 International Conference on Field Programmable Logic and Applications …, 2008 | 128 | 2008 |
| Deep neural network processing on hardware accelerators with stacked memory DC Burger, D Chiou, E Chung, AR Putnam US Patent App. 14/754,344, 2015 | 101* | 2015 |
| Accelerating homomorphic evaluation on reconfigurable hardware T Pöppelmann, M Naehrig, A Putnam, A Macias Cryptographic Hardware and Embedded Systems--CHES 2015: 17th International …, 2015 | 82 | 2015 |
| Performance and power of cache-based reconfigurable computing A Putnam, S Eggers, D Bennett, E Dellinger, J Mason, H Styles, ... Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2009 | 62 | 2009 |
| Instruction scheduling for a tiled dataflow architecture M Mercaldi, S Swanson, A Petersen, A Putnam, A Schwerin, M Oskin, ... ACM SIGOPS Operating Systems Review 40 (5), 141-150, 2006 | 54 | 2006 |
| Configurable Clouds AM Caulfield, ES Chung, A Putnam, H Angepat, D Firestone, J Fowers, ... IEEE Micro 37 (3), 52-61, 2017 | 52 | 2017 |
| A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ... Communications of the ACM 59 (11), 114-122, 2016 | 51 | 2016 |
| MPI as a programming model for high-performance reconfigurable computers M Saldaña, A Patel, C Madill, D Nunes, D Wang, P Chow, R Wittig, ... ACM Transactions on Reconfigurable Technology and Systems (TRETS) 3 (4), 1-29, 2010 | 50 | 2010 |
| Area-performance trade-offs in tiled dataflow architectures S Swanson, A Putnam, M Mercaldi, K Michelson, A Petersen, A Schwerin, ... Computer Architecture, 2006. ISCA'06. 33rd International Symposium on, 314-326, 2006 | 47 | 2006 |
| Machine learning classification on hardware accelerators with stacked memory DC Burger, D Chiou, E Chung, AR Putnam US Patent App. 14/754,323, 2015 | 36* | 2015 |
Doug BurgerTechnical Fellow, Microsoft Azuremicrosoft.com의 이메일 확인됨
