| Hardware redaction via designer-directed fine-grained eFPGA insertion P Mohan, O Atli, J Sweeney, O Kibar, L Pileggi, K Mai 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 34 | 2021 |
| Top-down physical design of soft embedded fpga fabrics P Mohan, O Atli, O Kibar, M Zackriya, L Pileggi, K Mai The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays …, 2021 | 13 | 2021 |
| Evaluating the impact of repetition, redundancy, scrubbing, and partitioning on 28-nm FPGA reliability through neutron testing OO Kibar, P Mohan, P Rech, K Mai IEEE Transactions on Nuclear Science 66 (1), 248-254, 2018 | 10 | 2018 |
| A Top-Down Design Methodology for Synthesizing FPGA Fabrics Using Standard ASIC Flow P Mohan, O Atli, OO Kibar, K Mai Proceedings of the 2020 ACM/SIGDA International Symposium on Field …, 2020 | 7 | 2020 |
| A Radiation Hardened by Design FPGA with Distributed Single Event Upset Sensors, Embedded Error Handler, and 8Mb Embedded MRAM Configuration Storage in 22nm Bulk FinFET CMOS. M King, K Mai, O Kibar, O Atli Sandia National Lab.(SNL-NM), Albuquerque, NM (United States), 2022 | | 2022 |
