Yongkee Kwon
Yongkee Kwon
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Cited by
Cited by
A Distributed Multi-GPU System for Fast Graph Processing
Z Jia, Y Kwon, G Shipman, P McCormick, M Erez, A Aiken
Proceedings of the VLDB Endowment 11 (3), 297-310, 2017
A 1ynm 1.25 V 8Gb, 16Gb/s/pin GDDR6-based Accelerator-in-Memory supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep-Learning Applications
S Lee, K Kim, S Oh, J Park, G Hong, D Ka, K Hwang, J Park, K Kang, ...
2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022
Multiple clone row DRAM: a low latency and area optimized DRAM
J Choi, W Shin, J Jang, J Suh, Y Kwon, Y Moon, LS Kim
Proceedings of the 42nd Annual International Symposium on Computer …, 2015
Accelerating linked-list traversal through near-data processing
B Hong, G Kim, JH Ahn, Y Kwon, H Kim, J Kim
2016 International Conference on Parallel Architecture and Compilation …, 2016
Near Data Acceleration with Concurrent Host Access
BY Cho, Y Kwon, S Lym, M Erez
Proceedings of the 47th International Symposium on Computer Architecture, 2020
Mini-batch serialization: Cnn training with inter-layer data reuse
S Lym, A Behroozi, W Wen, G Li, Y Kwon, M Erez
Proceedings of Machine Learning and Systems 1, 264-275, 2019
Analysis of power distribution network in TSV-based 3D-IC
K Kim, W Lee, J Kim, T Song, J Kim, JS Pak, J Kim, H Lee, Y Kwon, K Park
19th Topical Meeting on Electrical Performance of Electronic Packaging and …, 2010
DRAM-Latency Optimization Inspired by Relationship between Row-access Time and Refresh Timing
W Shin, J Choi, J Jang, J Suh, Y Moon, Y Kwon, LS Kim
IEEE Transactions on Computers, 1, 2015
System Architecture and Software Stack for GDDR6-AiM
Y Kwon, K Vladimir, N Kim, W Shin, J Won, M Lee, H Joo, H Choi, G Kim, ...
2022 IEEE Hot Chips 34 Symposium (HCS), 1-25, 2022
ERUCA: Efficient DRAM Resource Utilization and Resource Conflict Avoidance for Memory System Parallelism
S Lym, H Ha, Y Kwon, C Chang, J Kim, M Erez
HPCA, 2018
Data storage device and operating method thereof
D Kim, Y Kwon, H Kim
US Patent 9,594,525, 2017
SIP semiconductor system
HG Yang, HD Lee, YK Kwon, YS Moon, SW Kim, KH Kim
US Patent 8,811,101, 2014
Method for implementing spare logic of semiconductor memory apparatus and structure thereof
YS Moon, YK Kwon
US Patent App. 13/585,455, 2013
The compact memory scheduling maximizing row buffer locality
YS Moon, Y Kwon, HS Kim, D Kim, HH Lee, K Park
3rd JILP Workshop on Computer Architecture Competitions: Memory Scheduling …, 2012
Q-DRAM: Quick-Access DRAM with Decoupled Restoring from Row-Activation
W Shin, J Choi, J Jang, J Suh, Y Kwon, Y Moon, H Kim, LS Kim
IEEE Transactions on Computers, 2015
A 1ynm 1.25 V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application
D Kwon, S Lee, K Kim, S Oh, J Park, GM Hong, D Ka, K Hwang, J Park, ...
IEEE Journal of Solid-State Circuits 58 (1), 291-302, 2022
Semiconductor device including ECC circuit
HG Yang, HD Lee, YK Kwon, YS Moon
US Patent 8,996,956, 2015
Memory Network: Enabling Technology for Scalable Near-Data Computing
G Kim, J Kim, JH Ahn, Y Kwon
WoNDP in conjunction with the MICRO-47, 2014
Semiconductor memory apparatus and semiconductor system having the same
YS Moon, HD Lee, YK Kwon, HG Yang, SW Kim
US Patent App. 13/532,299, 2013
Data line termination circuit
YK Kwon, HD Lee
US Patent 7,863,928, 2011
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