| An adaptive impedance-matching network based on a novel capacitor matrix for wireless power transfer Y Lim, H Tang, S Lim, J Park IEEE Transactions on Power Electronics 29 (8), 4403-4413, 2013 | 496 | 2013 |
| Energy efficient canny edge detector for advanced mobile vision applications J Lee, H Tang, J Park IEEE Transactions on Circuits and Systems for Video Technology 28 (4), 1037-1046, 2016 | 90 | 2016 |
| Spike counts based low complexity SNN architecture with binary synapse H Tang, H Kim, H Kim, J Park IEEE Transactions on Biomedical Circuits and Systems 13 (6), 1664-1677, 2019 | 34 | 2019 |
| Rank order coding based spiking convolutional neural network architecture with energy-efficient membrane voltage updates H Tang, D Cho, D Lew, T Kim, J Park Neurocomputing 407, 300-312, 2020 | 17 | 2020 |
| Flexible nano-hybrid inverter based on inkjet-printed organic and 2D multilayer MoS2 thin film transistor JW Chung, YH Ko, YK Hong, W Song, C Jung, H Tang, J Lee, ... Organic Electronics 15 (11), 3038-3042, 2014 | 17 | 2014 |
| A hybrid multimode BCH encoder architecture for area efficient re-encoding approach H Tang, G Jung, J Park 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 1997-2000, 2015 | 15 | 2015 |
| An energy-quality scalable STDP based sparse coding processor with on-chip learning capability H Kim, H Tang, W Choi, J Park IEEE Transactions on Biomedical Circuits and Systems 14 (1), 125-137, 2020 | 11 | 2020 |
| A inversion-less Peterson algorithm based shared KES architecture for concatenated BCH decoder S An, H Tang, J Park 2015 International SoC Design Conference (ISOCC), 281-282, 2015 | 7 | 2015 |
| 3nm Gate-All-Around (GAA) Design-Technology Co-Optimization (DTCO) for succeeding PPA by Technology T Song, H Jung, G Yang, H Tang, H Kim, D Seo, H Kim, W Rim, S Baek, ... 2022 IEEE Custom Integrated Circuits Conference (CICC), 1-7, 2022 | 5 | 2022 |
| Unequal-error-protection error correction codes for the embedded memories in digital signal processors H Tang, J Park IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (6 …, 2015 | 4 | 2015 |
| Spike counts based low complexity learning with binary synapse H Tang, H Kim, D Cho, J Park 2018 International Joint Conference on Neural Networks (IJCNN), 1-8, 2018 | 2 | 2018 |
| A 4.13-GHz UHS Pseudo Two-Port SRAM With BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4-nm FinFET Technology J Kim, B Yook, Y Lee, T Choi, K Choi, C Lee, J Lee, H Kim, S Yun, C Do, ... IEEE Journal of Solid-State Circuits, 2024 | 1 | 2024 |
| 5-nm Low-Power SRAM Featuring Dual-Rail Architecture With Voltage-Tracking Assist Circuit for 5G Mobile Application S Baeck, I Lee, H Tang, D Seo, J Choi, T Song IEEE Solid-State Circuits Letters 5, 50-53, 2022 | 1 | 2022 |
| An Energy-efficient On-chip Learning Architecture for STDP based Sparse Coding H Kim, H Tang, J Park 2019 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2019 | 1 | 2019 |
| BCH decorder in which folded multiplier is equipped J Park, H Tang US Patent 10,009,041, 2018 | 1 | 2018 |
| 쓰기 동작의 에너지 감소를 통한 비터비 디코더 전용 저전력 임베디드 SRAM 설계 당호영， 신동엽， 송동후， 박종선 전자공학회논문지 50 (11), 117-123, 2013 | 1 | 2013 |
| Integrated circuit including static random access memory device EJ Lee, HY Tang, T Kim, DY Moon US Patent App. 18/201,465, 2023 | | 2023 |
| Neuron pruning in temporal domain for energy efficient SNN processor design D Lew, H Tang, J Park Frontiers in Neuroscience 17, 1285914, 2023 | | 2023 |
| Sram device and 3d semiconductor integrated circuit thereof HY Tang, T Kim, DY Moon, S Baeck, DW Seo US Patent App. 18/126,761, 2023 | | 2023 |
| Memory device K Jungmyung, H Tang, LEE Inhak, S Baeck, SEO Dongwook US Patent App. 17/881,187, 2023 | | 2023 |
