| Load balancing in decentralized smart grid trade system using blockchain K Inayat, SO Hwang Journal of Intelligent & Fuzzy Systems 35 (6), 5901-5911, 2018 | 29 | 2018 |
| Factored radix-8 systolic array for tensor processing I Ullah, K Inayat, JS Yang, J Chung 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 13 | 2020 |
| Hybrid Accumulator Factored Systolic Array for Machine Learning Acceleration K Inayat, J Chung IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2022 | 9 | 2022 |
| Carry-Propagation-Adder-Factored Gemmini Systolic Array for Machine Learning Acceleration K Inayat, J Chung Electronics 10 (6), 652, 2021 | 4 | 2021 |
| Power-Intent Systolic Array Using Modified Parallel Multiplier for Machine Learning Acceleration K Inayat, FB Muslim, J Iqbal, SA Hassnain Mohsan, HK Alkahtani, ... Sensors 23 (9), 4297, 2023 | 3 | 2023 |
| Energy Efficient Cross Layer Time Synchronization in Cognitive Radio Networks SM Hashmi, M Hussain, SM Arshad, K Inayat, SO Hwang International Journal of Internet Technology and Secured Transactions, 2020 | 3 | 2020 |
| Robust baggage detection and classification based on local tri-directional pattern Shahbano, M Abdullah, K Inayat International Journal of Internet Technology and Secured Transactions 12 (2 …, 2022 | 2* | 2022 |
| Implementation of Symbol Timing Recovery for Estimation of Clock Skew SM Hashmi, M Hussain, FB Muslim, K Inayat, SO Hwang International Journal of Internet Technology and Secured Transactions, 2020 | 2 | 2020 |
| CSA Based Radix-4 Gemmini Systolic Array for Machine Learning Applications MA Shafique, K Inayat, JA Lee Proceedings of the 13th International Symposium on Highly Efficient …, 2023 | 1 | 2023 |
| LPCHISEL: Automatic power intent generation for a chisel-based ASIC design FB Muslim, K Inayat, S Khan Computers and Electrical Engineering 115, 109115, 2024 | | 2024 |
| A Lightweight Public Key Encryption Scheme with Equality Test for Distributed Healthcare System K Inayat, FB Muslim, S Khan, I Kim, SO Hwang | | 2023 |
| Quickloop: An efficient, FPGA-accelerated exploration of parameterized DNN accelerators T Mahmood, K Inayat, J Chung | | 2023 |
| 2D Spatial Array Microarchitecture and Arithmetic Datapath Co-design for Machine Learning Acceleration K Inayat dCollection, 2023 | | 2023 |
| Robust Baggage Detection and Classification Based on Local Tri-directional Pattern MA Shahbano, K Inayat arXiv preprint arXiv:2006.07345, 2020 | | 2020 |
| Optimized Time Synchronization for Cognitive Radio Networks 황성운 ICGHIT, 2018 | | 2018 |
| Clock Frequency Offset Estimation using Symbol Timing Recovery 황성운 ICGHIT, 2018 | | 2018 |
| Load Balancing Trade Framework for Smart Grid System 황성운 ICGHIT, 2017 | | 2017 |
Seong Oun HwangGachon UniversityVerified email at gachon.ac.kr
