R. Madhava Krishnan
R. Madhava Krishnan
PhD student, Virginia Tech
Verified email at vt.edu
Cited by
Cited by
Durable transactional memory can scale with timestone
RM Krishnan, J Kim, A Mathew, X Fu, A Demeri, C Min, S Kannan
Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020
Mv-rlu: Scaling read-log-update with multi-versioning
J Kim, A Mathew, S Kashyap, MK Ramanathan, C Min
Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019
A controlled fetching technique for effective management of shared resources in SMT processors
MK Ramanathan, WM Lin
Microprocessors and Microsystems 57, 42-51, 2018
An intelligent fetching algorithm for efficient physical register file allocation in simultaneous multi-threading CPUs
MK Ramanathan, WM Lin
Int J Comput Syst 4 (4), 78-85, 2017
Tips: Making volatile index structures persistent with DRAM-NVMM tiering
RM Krishnan, WH Kim, X Fu, SK Monga, HW Lee, M Jang, A Mathew, ...
2021 USENIX Annual Technical Conference (USENIX ATC 21), 2021
Poseidon: Safe, Fast and Scalable Persistent Memory Allocator
A Demeri, WH Kim, RM Krishnan, J Kim, M Ismail, C Min
Proceedings of the 21st International Middleware Conference, 207-220, 2020
A Statistical Fetching Approach for Effective Management of Physical Register File in Simultaneous Multi Threading Processors
MK Ramanathan
The University of Texas at San Antonio, 2017
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