Andrew Herdrich
Andrew Herdrich
intel.com의 이메일 확인됨
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Cache QoS: From concept to reality in the Intel® Xeon® processor E5-2600 v3 product family
A Herdrich, E Verplanke, P Autee, R Illikkal, C Gianos, R Singhal, R Iyer
2016 IEEE International Symposium on High Performance Computer Architecture …, 2016
1162016
Rate-based QoS techniques for cache/memory in CMP platforms
A Herdrich, R Illikkal, R Iyer, D Newell, V Chadha, J Moses
Proceedings of the 23rd international conference on Supercomputing, 479-488, 2009
892009
Process for integration of a high dielectric constant gate insulator layer in a CMOS device
M Wang, CH Chen, L Yao, SC Chen
US Patent 6,656,764, 2003
882003
Method, apparatus, and system for energy efficiency and energy conservation including dynamic C0-state cache resizing
J Moses, RG Illikkal, R Iyer, JE Bendt, S Srinivasan, AJ Herdrich, ...
US Patent 8,984,311, 2015
602015
Parallel processing of service functions in service function chains
P Connor, I Weiny, I Gasparakis, AW Min, AJ Herdrich, D Kumar, TC Tai, ...
US Patent 9,462,084, 2016
552016
Use of parthenolide to inhibit cancer
H Nakshatri, CJ Sweeney
US Patent 6,890,946, 2005
54*2005
Hardware/software co-optimization to improve performance and energy for inter-VM communication for NFVs and other producer-consumer workloads
R Wang, AJ Herdrich, YC Liu, HH Hum, JS Park, CJ Hughes, ...
US Patent 10,817,425, 2020
452020
Thread migration support for architectually different cores
M Naik, GN Srinivasa, A Naveh, IM Sodhi, P Narvaez, E Gorbatov, ...
US Patent App. 13/997,811, 2014
422014
Methods and apparatuses for controlling thread contention
A Herdrich, R Illikkal, D Newell, R Iyer, V Chadha
US Patent 8,190,930, 2012
412012
Power efficient processor architecture
AJ Herdrich, RG Illikkal, R Iyer, S Srinivasan, J Moses, S Makineni
US Patent 9,870,047, 2018
402018
Communication headset
KD Eisenbraun
US Patent 6,751,331, 2004
372004
Managing data center resources to achieve a quality of service
M Ganguli, AS Narayan, J Moses, AJ Herdrich, R Khanna
US Patent 10,554,505, 2020
342020
Techniques to dynamically allocate resources of configurable computing resources
AJ Herdrich, K Sood, NR Jani, DJ Harriman, MA Ergin, SP Dubal, R Iyer
US Patent 9,733,987, 2017
342017
Processed neural signals and methods for generating and using them
KV Shenoy, RA Andersen, SA Kureshi
US Patent 6,731,964, 2004
302004
Method for booting a heterogeneous system and presenting a symmetric core view
E Weissmann, R Rappoport, M Mishaeli, H Shafi, O Lenz, JW Brandt, ...
US Patent 9,727,345, 2017
252017
PIRATE: QoS and performance management in CMP architectures
R Illikkal, V Chadha, A Herdrich, R Iyer, D Newell
ACM SIGMETRICS Performance Evaluation Review 37 (4), 3-10, 2010
242010
CAF: Core to core communication acceleration framework
Y Wang, R Wang, A Herdrich, J Tsai, Y Solihin
2016 International Conference on Parallel Architecture and Compilation …, 2016
202016
Hetergeneous processor apparatus and method
P Narvaez, GN Srinivasa, E Gorbatov, DR Subbareddy, M Naik, A Naveh, ...
US Patent 9,329,900, 2016
202016
Fucosylated oligosaccharides and process for their preparation
J Natunen
US Patent 6,878,819, 2005
192005
Cache-aware adaptive thread scheduling and migration
R Wang, TC Tai, PS Diefenbaugh, AJ Herdrich
US Patent 10,339,023, 2019
172019
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