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Cindy Eisner
Cindy Eisner
Unknown affiliation
Verified email at alumni.technion.ac.il
Title
Cited by
Cited by
Year
A practical introduction to PSL
C Eisner, D Fisman
Springer Science & Business Media, 2007
2962007
Reasoning with temporal logic on truncated paths
C Eisner, D Fisman, J Havlicek, Y Lustig, A McIsaac, DV Campenhout
International conference on computer aided verification, 27-39, 2003
2632003
RuleBase: An industry-oriented formal verification tool
I Beer, S Ben-David, C Eisner, A Landver
33rd Design Automation Conference Proceedings, 1996, 655-660, 1996
2141996
The temporal logic Sugar
I Beer, S Ben-David, C Eisner, D Fisman, A Gringauze, Y Rodeh
International Conference on Computer Aided Verification, 363-367, 2001
2052001
Efficient detection of vacuity in ACTL formulas
I Beer, S Ben-David, C Eisner, Y Rodeh
International Conference on Computer Aided Verification, 279-290, 1997
1741997
Formal verification of software source code through semi-automatic modeling
C Eisner
Software & Systems Modeling 4 (1), 14-31, 2005
1642005
Efficient detection of vacuity in temporal model checking
I Beer, S Ben-David, C Eisner, Y Rodeh
Formal Methods in System Design 18 (2), 141-163, 2001
1312001
RuleBase: Model checking at IBM
I Beer, S Ben-David, C Eisner, D Geist, L Gluhovsky, T Heyman, ...
International Conference on Computer Aided Verification, 480-483, 1997
641997
Comparing symbolic and explicit model checking of a software system
C Eisner, D Peled
International SPIN Workshop on Model Checking of Software, 230-239, 2002
552002
Model checking at IBM
S Ben-David, C Eisner, D Geist, Y Wolfsthal
Formal Methods in System Design 22 (2), 101-108, 2003
542003
Using symbolic model checking to verify the railway stations of Hoorn-Kersenboogerd and Heerhugowaard
C Eisner
Advanced Research Working Conference on Correct Hardware Design and …, 1999
381999
Resurrecting infeasible clock-gating functions
E Arbel, C Eisner, O Rokhlenko
2009 46th ACM/IEEE Design Automation Conference, 160-165, 2009
352009
The definition of a temporal clock operator
C Eisner, D Fisman, J Havlicek, A McIsaac, DV Campenhout
International Colloquium on Automata, Languages, and Programming, 857-870, 2003
342003
A topological characterization of weakness
C Eisner, D Fisman, J Havlicek
Proceedings of the twenty-fourth annual ACM symposium on Principles of …, 2005
302005
Automatic abstraction of software source
I Beer, C Eisner
US Patent 7,146,605, 2006
262006
On the effective deployment of functional formal verification
Y Abarbanel-Vinov, N Aizenbud-Reshef, I Beer, C Eisner, D Geist, ...
Formal Methods in System Design 19 (1), 35-44, 2001
212001
Augmenting a regular expression-based temporal logic with local variables
C Eisner, D Fisman
2008 Formal Methods in Computer-Aided Design, 1-8, 2008
202008
A methodology for formal design of hardware control with application to cache coherence protocols
C Eisner, I Shitsevalov, R Hoover, W Nation, K Nelson, K Valk
Proceedings of the 37th Annual Design Automation Conference, 724-729, 2000
192000
PSL for runtime verification: Theory and practice
C Eisner
International Workshop on Runtime Verification, 1-8, 2007
172007
Basic results on the semantics of Accellera PSL 1.1 foundation language
J Havlicek, D Fisman, C Eisner
Technical Report 2004.02, Accellera, 2004
172004
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