| The gem5 simulator: Version 20.0+ J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ... arXiv preprint arXiv:2007.03152, 2020 | 257 | 2020 |
| Enabling reproducible and agile full-system simulation BR Bruce, A Akram, H Nguyen, K Roarty, M Samani, M Friborz, T Reddy, ... 2021 IEEE International Symposium on Performance Analysis of Systems and …, 2021 | 11 | 2021 |
| LLM: Realizing Low-Latency Memory by Exploiting Embedded Silicon Photonics for Irregular Workloads M Fariborz, M Samani, P Fotouhi, R Proietti, IM Yi, V Akella, ... International Conference on High Performance Computing, 44-64, 2022 | 3 | 2022 |
| A model for scalable and balanced accelerators for graph processing M Fariborz, M Samani, T O'Neill, J Lowe-Power, SJB Yoo, V Akella IEEE Computer Architecture Letters 21 (2), 149-152, 2022 | 2 | 2022 |
| Methodologies for Evaluating Memory Models in gem5 M Samani University of California, Davis, 2021 | 2 | 2021 |
| TEGRA--Scaling Up Terascale Graph Processing with Disaggregated Computing W Shaddix, M Samani, M Fariborz, SJ Yoo, J Lowe-Power, V Akella arXiv preprint arXiv:2404.03155, 2024 | | 2024 |
| Scalable Hardware Acceleration of Graph Processing with Photonic Interconnects V Akella, M Fariborz, M Samani, SJB Yoo, J Lowe-Power 2023 International Conference on Photonics in Switching and Computing (PSC), 1-3, 2023 | | 2023 |
| Artifact Evaluation Committee A Akram, H Sadasivan, M Samani, M Hildebrand, M Babaie, MR Ardakani, ... | | |
| A CUDA-based Batcher-Banyan Network for Bitonic Sort K Vali, M Samani, M del Rosario | | |
Jason Lowe-PowerAssociate Professor, University of California, Davisucdavis.edu의 이메일 확인됨
