| Estimation of standby leakage power in CMOS circuit considering accurate modeling of transistor stacks Z Chen, M Johnson, L Wei, W Roy Proceedings. 1998 International Symposium on Low Power Electronics and …, 1998 | 508 | 1998 |
| Design and optimization of dual-threshold circuits for low-voltage low-power applications L Wei, Z Chen, K Roy, MC Johnson, Y Ye, VK De IEEE Transactions on Very Large Scale Integration (VLSI) Systems 7 (1), 16-24, 1999 | 416 | 1999 |
| Leakage control with efficient use of transistor stacks in single threshold CMOS MC Johnson, D Somasekhar, LY Chiou, K Roy IEEE Transactions on Very Large Scale Integration (VLSI) Systems 10 (1), 1-5, 2002 | 395 | 2002 |
| Design and optimization of low voltage high performance dual threshold CMOS circuits L Wei, Z Chen, M Johnson, K Roy, V De Proceedings of the 35th annual Design Automation Conference, 489-494, 1998 | 311 | 1998 |
| Models and algorithms for bounds on leakage in CMOS circuits MC Johnson, D Somasekhar, K Roy IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1999 | 261 | 1999 |
| Datapath scheduling with multiple supply voltages and level converters MC Johnson, K Roy ACM Transactions on Design Automation of Electronic Systems (TODAES) 2 (3 …, 1997 | 138 | 1997 |
| Software design for low power K Roy, MC Johnson Low power design in deep submicron electronics, 433-460, 1997 | 100 | 1997 |
| Optimal selection of supply voltages and level conversions during data path scheduling under resource constraints MC Johnson, K Roy Proceedings International Conference on Computer Design. VLSI in Computers …, 1996 | 54 | 1996 |
| Scheduling and optimal voltage selection for low power multi-voltage DSP datapaths MC Johnson, K Roy 1997 IEEE International Symposium on Circuits and Systems (ISCAS) 3, 2152-2155, 1997 | 41 | 1997 |
| A model for leakage control by MOS transistlor stacking MC Johnson, D Somasekhar, K Roy | 17 | 1997 |
| Subthreshold leakage control by multiple channel length CMOS (McCMOS) M Johnson, K Roy | 12 | 1997 |
| Work in progress-educational classroom technology: what works best in the engineering context C Brown, M Johnson, J Lax 2007 37th Annual Frontiers In Education Conference-Global Engineering …, 2007 | 6 | 2007 |
| Tablets for timely design documentation DG Meyer, MC Johnson, CM Brown 2008 Annual Conference & Exposition. Pittsburgh, Pennsylvania: ASEE Conferences, 2008 | 5 | 2008 |
| Multiple-V/sub dd/scheduling/allocation for partitioned floorplan D Kang, MC Johnson, K Roy Proceedings 21st International Conference on Computer Design, 412-418, 2003 | 5 | 2003 |
| Effects of types of active learning activity on two junior-level computer engineering courses S Bagchi, MC Johnson, S Chaterji 2008 38th Annual Frontiers in Education Conference, F2A-11-F2A-16, 2008 | 4 | 2008 |
| Low-power data-path scheduling under resource M Johnson Proceedings IEEE International Conference on Computer Design, 1996, 1996 | 4 | 1996 |
| Undergraduate dual-core prototyping and analysis of factors influencing student success on dual-core designs MC Johnson, E Villasenor, O Krachina, M Thottethodi 2009 IEEE International Conference on Microelectronic Systems Education, 1-4, 2009 | 3 | 2009 |
| A comparative study for performance and power consumption of FPGA digital interpolation filters T Donnelly, J Choi, AV Kildishev, M Swabey, MC Johnson International Journal of Advanced Computer Science and Applications (IJACSA …, 2017 | 2 | 2017 |
| Simultaneous multiple-V/sub dd/scheduling and allocation for partitioned floorplan D Kang, MC Johnson, K Roy International Symposium on Signals, Circuits and Systems. Proceedings, SCS …, 2004 | 2 | 2004 |
| System-on-a-Chip Design as a Platform for Teaching Design and Design Flow Integration J Covey, MC Johnson Proceedings of the 2019 on Great Lakes Symposium on VLSI, 249-253, 2019 | 1 | 2019 |
