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Aydin Aysu
Aydin Aysu
North Carolina State University
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End-to-end design of a PUF-based privacy preserving authentication protocol
A Aysu, E Gulcan, D Moriyama, P Schaumont, M Yung
Cryptographic Hardware and Embedded Systems--CHES 2015: 17th International ¡¦, 2015
1352015
Low-cost and area-efficient FPGA implementations of lattice-based cryptography
A Aysu, C Patterson, P Schaumont
2013 IEEE international symposium on hardware-oriented security and trust ¡¦, 2013
1162013
SIMON says: Break area records of block ciphers on FPGAs
A Aysu, E Gulcan, P Schaumont
IEEE Embedded Systems Letters 6 (2), 37-40, 2014
1082014
Maskednet: The first hardware inference engine aiming power side-channel protection
A Dubey, R Cammarota, A Aysu
2020 IEEE International Symposium on Hardware Oriented Security and Trust ¡¦, 2020
86*2020
Horizontal side-channel vulnerabilities of post-quantum key exchange protocols
A Aysu, Y Tobah, M Tiwari, A Gerstlauer, M Orshansky
2018 IEEE international symposium on hardware oriented security and trust ¡¦, 2018
682018
Efficient hardware implementations of high throughput SHA-3 candidates keccak, luffa and blue midnight wish for single-and multi-message hashing
A Akin, A Aysu, OC Ulusel, E Savaş
Proceedings of the 3rd International Conference on Security of Information ¡¦, 2010
592010
An extensive study of flexible design methods for the number theoretic transform
AC Mert, E Karabulut, E Öztürk, E Savaş, A Aysu
IEEE Transactions on Computers 71 (11), 2829-2843, 2020
572020
Digital fingerprints for low-cost platforms using MEMS sensors
A Aysu, NF Ghalaty, Z Franklin, MP Yali, P Schaumont
Proceedings of the Workshop on Embedded Systems Security, 1-6, 2013
482013
A flexible and scalable NTT hardware: Applications from homomorphically encrypted deep learning to post-quantum cryptography
AC Mert, E Karabulut, E Öztürk, E Savaş, M Becchi, A Aysu
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 346-351, 2020
452020
BoMaNet: Boolean masking of an entire neural network
A Dubey, R Cammarota, A Aysu
Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020
432020
Binary Ring-LWE hardware with power side-channel countermeasures
A Aysu, M Orshansky, M Tiwari
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE ¡¦, 2018
432018
A flexible and compact hardware architecture for the SIMON block cipher
E Gulcan, A Aysu, P Schaumont
Lightweight Cryptography for Security and Privacy: Third International ¡¦, 2015
432015
Using power-anomalies to counter evasive micro-architectural attacks in embedded systems
S Wei, A Aysu, M Orshansky, A Gerstlauer, M Tiwari
2019 IEEE International Symposium on Hardware Oriented Security and Trust ¡¦, 2019
322019
RANTT: A RISC-V Architecture Extension for the Number Theoretic Transform
E Karabulut, A Aysu
30th International Conference on Field-Programmable Logic (FPL), 2020
282020
Single-trace side-channel attacks on ¥ø-small polynomial sampling: With applications to ntru, NTRU prime, and CRYSTALS-DILITHIUM
E Karabulut, E Alkim, A Aysu
2021 IEEE International Symposium on Hardware Oriented Security and Trust ¡¦, 2021
262021
Falcon Down: Breaking Falcon Post-Quantum Signature Scheme through Side-Channel Attacks
E Karabulut, A Aysu
Design Automation Conference (DAC), 2021
262021
Seql: Secure scan-locking for ip protection
S Potluri, A Aysu, A Kumar
2020 21st International Symposium on Quality Electronic Design (ISQED), 7-13, 2020
26*2020
Precomputation methods for hash-based signatures on energy-harvesting platforms
A Aysu, P Schaumont
IEEE Transactions on Computers 65 (9), 2925-2931, 2015
25*2015
Analyzing and eliminating the causes of fault sensitivity analysis
NF Ghalaty, A Aysu, P Schaumont
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
252014
A new maskless debiasing method for lightweight physical unclonable functions
A Aysu, Y Wang, P Schaumont, M Orshansky
2017 IEEE International Symposium on Hardware Oriented Security and Trust ¡¦, 2017
222017
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