| Lut-gemm: Quantized matrix multiplication based on luts for efficient inference in large-scale generative language models G Park, B Park, M Kim, S Lee, J Kim, B Kwon, SJ Kwon, B Kim, Y Lee, ... arXiv preprint arXiv:2206.09557, 2022 | 132 | 2022 |
| 6.4 Gb/s multi-threaded BCH encoder and decoder for multi-channel SSD controllers Y Lee, H Yoo, I Yoo, IC Park 2012 IEEE International Solid-State Circuits Conference, 426-428, 2012 | 87 | 2012 |
| Efficient parallel architecture for linear feedback shift registers J Jung, H Yoo, Y Lee, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 62 (11), 1068-1072, 2015 | 49 | 2015 |
| Low-complexity tree architecture for finding the first two minima Y Lee, B Kim, J Jung, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 62 (1), 61-64, 2014 | 48 | 2014 |
| Design and analysis of approximate compressors for balanced error accumulation in mac operator G Park, J Kung, Y Lee IEEE Transactions on Circuits and Systems I: Regular Papers 68 (7), 2950-2961, 2021 | 47 | 2021 |
| High-throughput and low-complexity BCH decoding architecture for solid-state drives Y Lee, H Yoo, I Yoo, IC Park IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (5 …, 2013 | 40 | 2013 |
| Low-complexity parallel Chien search structure using two-dimensional optimization Y Lee, H Yoo, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 58 (8), 522-526, 2011 | 39 | 2011 |
| GROW: A Row-Stationary Sparse-Dense GEMM Accelerator for Memory-Efficient Graph Convolutional Neural Networks R Hwang, M Kang, J Lee, D Kam, Y Lee, M Rhu 2023 IEEE International Symposium on High-Performance Computer Architecture …, 2023 | 34 | 2023 |
| A 2.74-pJ/bit, 17.7-Gb/s iterative concatenated-BCH decoder in 65-nm CMOS for NAND flash memory Y Lee, H Yoo, J Jung, J Jo, IC Park IEEE Journal of Solid-State Circuits 48 (10), 2531-2540, 2013 | 34 | 2013 |
| Approximate LSTM Computing for Energy-Efficient Speech Recognition J Jo, J Kung, Y Lee Electronics 9 (12), 2004, 2020 | 32 | 2020 |
| 7.3 Gb/s universal BCH encoder and decoder for SSD controllers H Yoo, Y Lee, IC Park 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), 37-38, 2014 | 30 | 2014 |
| Memory-Reduced Network Stacking for Edge-Level CNN Architecture With Structured Weight Pruning S Moon, Y Byun, J Park, S Lee, Y Lee IEEE Journal on Emerging and Selected Topics in Circuits and Systems 9 (4 …, 2019 | 24 | 2019 |
| Simplified Compressor and Encoder Designs for Low-Cost Approximate Radix-4 Booth Multiplier G Park, J Kung, Y Lee IEEE Transactions on Circuits and Systems II: Express Briefs 70 (3), 1154-1158, 2022 | 19 | 2022 |
| FPGA-based real-time lane detection for advanced driver assistance systems S Hwang, Y Lee 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 218-219, 2016 | 19 | 2016 |
| Small-area parallel syndrome calculation for strong BCH decoding Y Lee, H Yoo, IC Park 2012 IEEE International Conference on Acoustics, Speech and Signal …, 2012 | 19 | 2012 |
| Low-Cost Network Scheduling of 3D-CNN Processing for Embedded Action Recognition H Lee, YS Kim, M Kim, Y Lee IEEE Access, 2021 | 18 | 2021 |
| Energy-Efficient Wearable EPTS Device Using On-Device DCNN Processing for Football Activity Classification H Kim, J Kim, YS Kim, M Kim, Y Lee Sensors 20 (21), 6004, 2020 | 16 | 2020 |
| Massive MIMO Systems With Low-Resolution ADCs: Baseband Energy Consumption vs. Symbol Detection Performance S Moon, IS Kim, D Kam, DW Jee, J Choi, Y Lee IEEE Access 7, 6650-6660, 2019 | 16 | 2019 |
| Area and energy efficient 802.11 ad LDPC decoding processor M Li, Y Lee, Y Huang, L Van der Perre Electronics Letters 51 (4), 339-341, 2015 | 16 | 2015 |
| Layerwise Buffer Voltage Scaling for Energy-Efficient Convolutional Neural Network M Ha, Y Byun, S Moon, Y Lee, S Lee IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 15 | 2020 |
In-Cheol ParkProfessor of Electrical Engineering, KAISTkaist.edu의 이메일 확인됨
