| Implementation of high-speed SHA-1 architecture EH Lee, JH Lee, IH Park, KR Cho IEICE Electronics Express 6 (16), 1174-1179, 2009 | 32 | 2009 |
| Implementation of HIGHT cryptic circuit for RFID tag YI Lim, JH Lee, Y You, KR Cho IEICE Electronics Express 6 (4), 180-186, 2009 | 30 | 2009 |
| A low-power implementation of asynchronous 8051 employing adaptive pipeline structure JH Lee, YH Kim, KR Cho IEEE Transactions on Circuits and Systems II: Express Briefs 55 (7), 673-677, 2008 | 25 | 2008 |
| A novel asynchronous pipeline architecture for CISC type embedded controller, A8051 JH Lee, WC Lee, KR Cho The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002 …, 2002 | 20 | 2002 |
| Design of a fast asynchronous embedded CISC microprocessor, A8051 JH Lee, YH Kim, KR Cho IEICE transactions on electronics 87 (4), 527-534, 2004 | 15 | 2004 |
| Design of parallel BCH decoder for MLC memory SC Jang, JH Lee, WC Lee, KR Cho 2008 International SoC Design Conference 3, III-46-III-47, 2008 | 13 | 2008 |
| New data encoding method with a multi-value logic for low power asynchronous circuit design EJ Choi, KR Cho, JH Lee 36th International Symposium on Multiple-Valued Logic (ISMVL'06), 4-4, 2006 | 8 | 2006 |
| Implementation of IEEE 802.11 a Wireless LAN H Lee, JH Lee, SM Kim, KR Cho 2008 Third International Conference on Convergence and Hybrid Information …, 2008 | 7 | 2008 |
| Design of a high performance self-timed ARM9 processor JH Lee, KR Cho IEICE Electronics Express 5 (3), 87-93, 2008 | 6 | 2008 |
| Composite endoscope images from massive inner intestine photos E Kim, KH Yoo, JH Lee, YD Kim, Y You New Trends in Applied Artificial Intelligence: 20th International Conference …, 2007 | 6 | 2007 |
| Performance and power modeling of on-chip bus system for a complex SoC H Lee, JH Lee, KR Cho IEICE Transactions on Electronics 93 (10), 1525-1535, 2010 | 5 | 2010 |
| A hybrid control scheme for driving current sources of pm-oled panel SM Kim, JH Lee, KR Cho IEEE Transactions on Consumer Electronics 55 (2), 644-649, 2009 | 5 | 2009 |
| Improved cycle time synchronization method for isochronous data transfer on wireless 1394 network SH Park, IS Jang, SH Lee, S Choi, KR Cho, JH Lee 2008 IEEE International Conference on Ultra-Wideband 3, 113-116, 2008 | 4 | 2008 |
| Implementation of ieee 802.11 a wlan baseband processor JH Lee, YI Lim, KR Cho 2007 Digest of Technical Papers International Conference on Consumer …, 2007 | 4 | 2007 |
| Asynchronous ARM processor employing an adaptive pipeline architecture JH Lee, SS Lee, KR Cho Reconfigurable Computing: Architectures, Tools and Applications: Third …, 2007 | 3 | 2007 |
| Efficient co-simulation framework enhancing system-level power estimation for a platform-based SoC design JH Lee, SC Kim, YH Kim, K Cho Microelectronics journal 42 (11), 1290-1298, 2011 | 2 | 2011 |
| Design of a High Speed SHA-1 Architecture Using Unfolded Pipeline for Biomedical Applications EH Lee, SM Kim, JH Lee, K Cho Proceedings of the International Multi-Conference on Society, Cybernetics …, 2009 | 2 | 2009 |
| Isochronous data transfer between AV devices using Pseudo CMP protocol in IEEE 1394 over UWB network SH Park, SH Lee, IS Jang, SS Choi, JH Lee, Y You IEICE transactions on communications 90 (12), 3748-3751, 2007 | 2 | 2007 |
| Modeling and analysis of the system bus on the SoC platform YS Cho, JH Lee, KR Cho J. IEEK 42 (12), 35-44, 2005 | 2 | 2005 |
| RZ/NRZ dual-rail decoding scheme to reduce switching activities in asynchronous circuits WC Lee, JH Lee, KR Cho Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System …, 2004 | 2 | 2004 |
