Samantak Gangopadhyay
Samantak Gangopadhyay
Graduate Student(Ph.D), Georgia Institute of Technology
Verified email at
Cited by
Cited by
5.6 A 0.13 μm fully digital low-dropout regulator with adaptive control and reduced dynamic stability for ultra-wide dynamic range
SB Nasir, S Gangopadhyay, A Raychowdhury
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of†…, 2015
All-digital low-dropout regulator with adaptive control and reduced dynamic stability for digital load circuits
SB Nasir, S Gangopadhyay, A Raychowdhury
IEEE Transactions on Power Electronics 31 (12), 8293-8302, 2016
A 32 nm embedded, fully-digital, phase-locked low dropout regulator for fine grained power management in digital circuits
S Gangopadhyay, D Somasekhar, JW Tschanz, A Raychowdhury
IEEE Journal of Solid-State Circuits 49 (11), 2684-2693, 2014
Modeling and analysis of digital linear dropout regulators with adaptive control for high efficiency under wide dynamic range digital loads
S Gangopadhyay, Y Lee, SB Nasir, A Raychowdhury
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
Integrated power management in IoT devices under wide dynamic ranges of operation
S Gangopadhyay, SB Nasir, A Raychowdhury
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
UVFR: A Unified Voltage and Frequency Regulator with 500MHz/0.84 V to 100KHz/0.27 V operating range, 99.4% current efficiency and 27% supply guardband reduction
S Gangopadhyay, SB Nasir, A Subramanian, V Sathe, A Raychowdhury
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 321-324, 2016
A FerroFET-based in-memory processor for solving distributed and iterative optimizations via least-squares method
I Yoon, M Chang, K Ni, M Jerry, S Gangopadhyay, GH Smith, T Hamam, ...
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 5†…, 2019
A FeFET based processing-in-memory architecture for solving distributed least-square optimizations
I Yoon, M Chang, K Ni, M Jerry, S Gangopadhyay, G Smith, T Hamam, ...
2018 76th Device Research Conference (DRC), 1-2, 2018
Leakage current supply circuit for reducing low drop-out voltage regulator headroom
FI Atallah, HH Nguyen, KA Bowman, YN Kolla, BL Price, ...
US Patent 9,625,924, 2017
Stacked multiple-input delay gates
V Agarwal, S Gangopadhyay, M Kumar
US Patent 9,122,823, 2015
Structure for stacked CMOS circuits
V Agarwal, S Gangopadhyay, S Joshi, M Kumar
US Patent 8,904,322, 2014
The role of adaptation and resiliency in computation and power management: Special session paper
A Raychowdhury, SB Nasir, S Gangopadhyay
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 74-79, 2014
A Quad-Output Elastic Switched Capacitor Converter and Per-Core LDO with 87% Power Efficiency and 2.5◊ Core-Frequency Range Improvement
S Gangopadhyay, JW Tschanz, A Raychowdhury
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020
A 7nm leakage-current-supply circuit for LDO dropout voltage reduction
K Bowman, S Gangopadhyay, F Atallah, H Nguyen, J Jeong, D Yingling, ...
2019 Symposium on VLSI Circuits, C126-C127, 2019
Efficient signal reconstruction via distributed least square optimization on a systolic FPGA architecture
M Chang, S Gangopadhyay, T Hamam, J Romberg, A Raychowdhury
ICASSP 2019-2019 IEEE International Conference on Acoustics, Speech and†…, 2019
Digitally-assisted leakage current supply circuit for reducing the analog LDO minimum dropout voltage
S Gangopadhyay, SB Nasir, H Nguyen, J Jeong, F Atallah, K Bowman, ...
2017 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2017
A 7-nm All-Digital Leakage-Current-Supply Circuit for Analog LDO Dropout Voltage Reduction
KA Bowman, S Gangopadhyay, FI Atallah, HH Nguyen, J Jeong, ...
IEEE Solid-State Circuits Letters 2 (12), 297-300, 2019
On-die adaptive power regulation and distribution for digital loads
S Gangopadhyay
Georgia Institute of Technology, 2017
2019 Index IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Vol. 5
O Afuye, S Agarwal, S Ambrogio, J Appenzeller, A Apsel, CH Bennett, ...
Reis 123, 131, 0
ii Special Topic on Ferroelectric Transistors for Advanced Logic, Analog, and Memory Applications by A. Naeemi PAPERS
D Reis, K Ni, W Chakraborty, X Yin, M Trentzsch, S DŁnkel, T Melde, ...
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