| A detailed DVB-S2 receiver implementation: FPGA prototyping and preliminary ASIC resource estimation ER De Lima, AFR Queiroz, DC Alves, GS Da Silva, CG Chaves, ... 2014 IEEE Latin-America Conference on Communications (LATINCOM), 1-6, 2014 | 10 | 2014 |
| An MR-FSK transceiver compliant to IEEE802. 15.4 g for smart metering utility applications: FPGA implementation and ASIC resource estimation JAJ de Oliveira, AFR Queiroz, ER de Lima, JG Mertes IEEE Latin America Transactions 14 (6), 2565-2569, 2016 | 7 | 2016 |
| Design and FPGA prototyping of a DVB-S2 receiver: Towards a VLSI implementation in CMOS ER de Lima, AFR Queiroz, GS da Silva, FAM Erazo, JE Bertuzzo 3rd Workshop on Circuits and Systems Design (WCAS 2013), 2013 | 6 | 2013 |
| An adaptive equalizer for reliable transmissions in DVB-S2 satellite communications under ISI AN Sapper, ER de Lima, CG Chaves, GS da Silva, AFR Queiroz, ... 2014 IEEE Latin-America Conference on Communications (LATINCOM), 1-6, 2014 | 3 | 2014 |
| Fpga implementation of an ieee802. 15.4 g mr-ofdm baseband modem for smart metering utility networks AFR Queiroz, GS da Silva, CG Chaves, TD Perez, DG Urdanetta, ... 2015 IEEE 4th Global Conference on Consumer Electronics (GCCE), 125-126, 2015 | 2 | 2015 |
| FPGA implementation of a FEC decoding subsystem for a DVB-S2 receiver DC Alves, CG Chaves, ER de Lima, GS da Silva, AFR Queiroz 2014 IX Southern Conference on Programmable Logic (SPL), 1-6, 2014 | 2 | 2014 |
| A novel fine frequency estimation serial architecture applied in satellite communications GS da Silva, AFR Queiroz, ER de Lima, CG Chaves 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2173-2176, 2015 | | 2015 |
