| TEAM: Threshold adaptive memristor model S Kvatinsky, EG Friedman, A Kolodny, UC Weiser IEEE transactions on circuits and systems I: regular papers 60 (1), 211-221, 2012 | 934 | 2012 |
| MAGIC—Memristor-aided logic S Kvatinsky, D Belousov, S Liman, G Satat, N Wald, EG Friedman, ... IEEE Transactions on Circuits and Systems II: Express Briefs 61 (11), 895-899, 2014 | 863 | 2014 |
| VTEAM: A general model for voltage-controlled memristors S Kvatinsky, M Ramadan, EG Friedman, A Kolodny IEEE Transactions on Circuits and Systems II: Express Briefs 62 (8), 786-790, 2015 | 822 | 2015 |
| Memristor-based material implication (IMPLY) logic: Design principles and methodologies S Kvatinsky, G Satat, N Wald, EG Friedman, A Kolodny, UC Weiser IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (10 …, 2013 | 706 | 2013 |
| Clock distribution networks in synchronous digital integrated circuits EG Friedman Proceedings of the IEEE 89 (5), 665-692, 2001 | 647 | 2001 |
| 3-D topologies for networks-on-chip VF Pavlidis, EG Friedman IEEE transactions on very large scale integration (VLSI) systems 15 (10 …, 2007 | 597 | 2007 |
| On-chip optical interconnect roadmap: Challenges and critical directions M Haurylau, G Chen, H Chen, J Zhang, NA Nelson, DH Albonesi, ... IEEE Journal of Selected Topics in Quantum Electronics 12 (6), 1699-1705, 2006 | 546 | 2006 |
| Effects of inductance on the propagation delay and repeater insertion in VLSI circuits YI Ismail, EG Friedman Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 721-724, 1999 | 544 | 1999 |
| Three-dimensional integrated circuit design VF Pavlidis, I Savidis, EG Friedman Newnes, 2017 | 467 | 2017 |
| Multi-Voltage CMOS Circuit Design V Kursun, EG Friedman Multi-Voltage CMOS Circuit Design, i-xv, 2006 | 393 | 2006 |
| Figures of merit to characterize the importance of on-chip inductance YI Ismail, EG Friedman, JL Neves Proceedings of the 35th annual Design Automation Conference, 560-565, 1998 | 374 | 1998 |
| MRL—Memristor ratioed logic S Kvatinsky, N Wald, G Satat, A Kolodny, UC Weiser, EG Friedman 2012 13th International Workshop on Cellular Nanoscale Networks and their …, 2012 | 346 | 2012 |
| Equivalent Elmore delay for RLC trees YI Ismail, EG Friedman, JL Neves Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 715-720, 1999 | 341 | 1999 |
| Predictions of CMOS compatible on-chip optical interconnect G Chen, H Chen, M Haurylau, N Nelson, PM Fauchet, EG Friedman, ... Proceedings of the 2005 international workshop on System level interconnect …, 2005 | 306 | 2005 |
| Repeater design to reduce delay and power in resistive interconnect V Adler, EG Friedman IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1998 | 305 | 1998 |
| Power distribution networks with on-chip decoupling capacitors M Popovich, A Mezhiba, EG Friedman Springer Science & Business Media, 2007 | 291 | 2007 |
| Closed-form expressions of 3-D via resistance, inductance, and capacitance I Savidis, EG Friedman IEEE Transactions on Electron Devices 56 (9), 1873-1881, 2009 | 252 | 2009 |
| Clock Distribution Networks VLSI Circuits and Systems EG Friedman A Selected Reprint Volume, 1995 | 241 | 1995 |
| Dynamically tuning processor resources with adaptive processing DH Albonesi, R Balasubramonian, SG Dropsbo, S Dwarkadas, ... Computer 36 (12), 49-58, 2003 | 213 | 2003 |
| Memristor-based circuit design for multilayer neural networks Y Zhang, X Wang, EG Friedman IEEE Transactions on Circuits and Systems I: Regular Papers 65 (2), 677-686, 2017 | 207 | 2017 |
Avinoam KolodnyProfessor of Electrical and Computer Engineering, Technionee.technion.ac.il의 이메일 확인됨
