Suman Datta
Suman Datta
Stinson Professor of Nanotechnology
Verified email at nd.edu - Homepage
TitleCited byYear
Benchmarking nanotechnology for high-performance and low-power logic transistor applications
R Chau, S Datta, M Doczy, B Doyle, B Jin, J Kavalieros, A Majumdar, ...
IEEE transactions on nanotechnology 4 (2), 153-158, 2005
7752005
High-/spl kappa//metal-gate stack and its MOSFET characteristics
R Chau, S Datta, M Doczy, B Doyle, J Kavalieros, M Metz
IEEE Electron Device Letters 25 (6), 408-410, 2004
6332004
High performance fully-depleted tri-gate CMOS transistors
BS Doyle, S Datta, M Doczy, S Hareland, B Jin, J Kavalieros, T Linton, ...
IEEE Electron Device Letters 24 (4), 263-265, 2003
5922003
Tri-gate devices and methods of fabrication
RS Chau, BS Doyle, J Kavalieros, D Barlage, S Datta, SA Hareland
US Patent 6,858,478, 2005
4732005
Tri-gate devices and methods of fabrication
RS Chau, BS Doyle, J Kavalieros, D Barlage, S Datta
US Patent 7,358,121, 2008
3802008
Integrated nanoelectronics for the future
R Chau, B Doyle, S Datta, J Kavalieros, K Zhang
Nature materials 6 (11), 810, 2007
3612007
Tri-gate fully-depleted CMOS transistors: Fabrication, design and layout
B Doyle, B Boyanov, S Datta, M Doczy, S Hareland, B Jin, J Kavalieros, ...
2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No …, 2003
3502003
Tri-gate transistor architecture with high-k gate dielectrics, metal gates and strain engineering
J Kavalieros, B Doyle, S Datta, G Dewey, M Doczy, B Jin, D Lionberger, ...
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 50-51, 2006
2872006
Two-dimensional gallium nitride realized via graphene encapsulation
ZY Al Balushi, K Wang, RK Ghosh, RA Vilá, SM Eichfeld, JD Caldwell, ...
Nature materials 15 (11), 1166, 2016
2462016
Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication
SA Hareland, RS Chau, BS Doyle, R Rios, T Linton, S Datta
US Patent 7,456,476, 2008
2392008
Atomically thin resonant tunnel diodes built from synthetic van der Waals heterostructures
YC Lin, RK Ghosh, R Addou, N Lu, SM Eichfeld, H Zhu, MY Li, X Peng, ...
Nature communications 6, 7311, 2015
2342015
Complementary metal oxide semiconductor integrated circuit using raised source drain and replacement metal gate
J Kavalieros, A Cappellani, JK Brask, ML Doczy, MV Metz, S Datta, ...
US Patent 7,569,443, 2009
2272009
Nonplanar device with stress incorporation layer and method of fabrication
SA Hareland, RS Chau, BS Doyle, S Datta, BY Jin
US Patent 6,909,151, 2005
2212005
Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication
SA Hareland, RS Chau, BS Doyle, R Rios, T Linton, S Datta
US Patent 7,820,513, 2010
2162010
Transistor Elements for 30nm Physical Gate Lengths and Beyond.
B Doyle, R Arghavani, D Barlage, S Datta, M Doczy, J Kavalieros, ...
Intel Technology Journal 6 (2), 2002
2132002
SRAM and logic transistors with variable height multi-gate transistor architecture
S Datta, BS Doyle, JT Kavalieros, Y Wang
US Patent App. 11/648,521, 2008
2082008
Method and apparatus for improving stability of a 6T CMOS SRAM cell
S Datta, BS Doyle, RS Chau, J Kavalieros, B Zheng, SA Hareland
US Patent 6,970,373, 2005
2002005
Temperature-DependentCharacteristics of a VerticalTunnel FET
S Mookerjea, D Mohata, T Mayer, V Narayanan, S Datta
IEEE Electron Device Letters 31 (6), 564-566, 2010
1982010
Block contact architectures for nanoscale channel transistors
M Radosavljevic, A Majumdar, BS Doyle, J Kavalieros, ML Doczy, ...
US Patent 7,279,375, 2007
1952007
Application of high-κ gate dielectrics and metal gate electrodes to enable silicon and non-silicon logic nanotechnology
R Chau, J Brask, S Datta, G Dewey, M Doczy, B Doyle, J Kavalieros, B Jin, ...
Microelectronic Engineering 80, 1-6, 2005
1932005
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