| Concurrent design analysis of high-linearity SP10T switch with 8.5 kV ESD protection XS Wang, X Wang, F Lu, C Zhang, Z Dong, L Wang, R Ma, Z Shi, A Wang, ... IEEE Journal of Solid-State Circuits 49 (9), 1927-1941, 2014 | 80 | 2014 |
| A Systematic Study of ESD Protection Co-Design With High-Speed and High-Frequency ICs in 28 nm CMOS F Lu, R Ma, Z Dong, L Wang, C Zhang, C Wang, Q Chen, XS Wang, ... IEEE Transactions on Circuits and Systems I: Regular Papers, 1-12, 2016 | 50 | 2016 |
| An Analog Neural Network Computing Engine using CMOS-Compatible Charge-Trap-Transistor (CTT) Y Du, L Du, X Gu, J Du, XS Wang, B Hu, M Jiang, X Chen, SS Iyer, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018 | 48 | 2018 |
| A Dual-Band SP6T T/R Switch in SOI CMOS With 37-dBm for GSM/W-CDMA Handsets XS Wang, CP Yue Microwave Theory and Techniques, IEEE Transactions on 62 (4), 1-10, 2014 | 47 | 2014 |
| A full-chip ESD protection circuit simulation and fast dynamic checking method using SPICE and ESD behavior models F Zhang, C Wang, F Lu, Q Chen, C Li, XS Wang, D Li, A Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 22 | 2018 |
| Fuse-based field-dispensable ESD protection for ultra-high-speed ICs C Zhang, Z Dong, F Lu, R Ma, L Wang, H Zhao, X Wang, X Wang, H Tang, ... IEEE Electron Device Letters 35 (3), 381-383, 2014 | 20 | 2014 |
| In-Die Through-BEOL Metal Wall for Noise Isolation in 180nm FD-SOI CMOS AW Fei Lu, Qi Chen, Chenkun Wang, Feilong Zhang, Cheng Li, Rui Ma, X. Shawn Wang IEEE Electron Device Letters, 2017 | 12 | 2017 |
| A smartphone SP10T T/R switch in 180-nm SOI CMOS with 8kV+ ESD protection by co-design XS Wang, X Wang, F Lu, L Wang, R Ma, Z Dong, L Sun, A Wang, CP Yue, ... Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 1-4, 2013 | 11 | 2013 |
| ESD and RF switch co-design in SOI CMOS for smartphones from 2G to 5G C Wang, XS Wang, F Zhang, C Li, M Di, A Wang 2018 Texas Symposium on Wireless and Microwave Circuits and Systems (WMCS), 1-4, 2018 | 8 | 2018 |
| A 2-GS/s 8-bit ADC featuring virtual-ground sampling interleaved architecture in 28-nm CMOS XS Wang, X Jin, J Du, Y Li, Y Du, CH Wong, YC Kuan, CH Chan, ... IEEE Transactions on Circuits and Systems II: Express Briefs 65 (11), 1534-1538, 2017 | 8 | 2017 |
| An 8.8-GS/s 8b Time-Interleaved SAR ADC with 50-dB SFDR Using Complementary Dual-Loop-Assisted Buffers in 28nm CMOS X. Shawn Wang, Chi-Hang Chan, Jieqiong Du, Chien-Heng Wong, Yilei Li, Yuan ... 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 88-91, 2018 | 4 | 2018 |
| A design technique overview on broadband RF ESD protection circuit designs L Wang, R Ma, A Wang, X Wang, B Zhao, SX Wang, P Yue, Z Shi, ... 2012 IEEE 55th International Midwest Symposium on Circuits and Systems …, 2012 | 4 | 2012 |
| A Compact Single-Ended Dual-band Receiver with Crosstalk and ISI Reductions for High-density I/O Interfaces J Du, J Zhou, XS Wang, CH Wong, HN Chen, CP Jou, MCF Chang 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 231-234, 2019 | 3 | 2019 |
| More-Than-Moore: 3D heterogeneous integration into CMOS technologies A Wang, Q Chen, C Li, F Lu, C Wang, F Zhang, XS Wang, J Ng, YH Xie, ... 2017 IEEE 12th International Conference on Nano/Micro Engineered and …, 2017 | 3 | 2017 |
| A Memristive Neural Network Computing Engine using CMOS-Compatible Charge-Trap-Transistor (CTT) Y Du, L Du, X Gu, X Wang, MCF Chang CoRR, 2017 | 3 | 2017 |
| 0.75 V 2.6 GHz digital bang–bang PLL with dynamic double‐tail phase detector and supply‐noise‐tolerant gm‐controlled DCO CH Wong, Y Li, J Du, X Wang, MCF Chang Electronics Letters 54 (4), 198-200, 2018 | 2 | 2018 |
| Characterization and modeling of 18–40GHz mm-wave tunneling diode detector X Wang, H Xue 2011 3rd International Conference on Computer Research and Development 3 …, 2011 | 1 | 2011 |
| Efficient Track-and-Hold Techniques for High Speed Time-interleaved ADCs X Wang University of California, Los Angeles, 2018 | | 2018 |
| Concurrent design analysis of A 8500V ESD-protected SP10T switch in SOI CMOS XS Wang, X Wang, Z Dong, F Lu, L Wang, R Ma, C Zhang, A Wang, ... 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference …, 2013 | | 2013 |
| High Performance Signal-Pole Multi-Throw T/R Switch Design for Cellular Applications XS Wang University of California, Santa Barbara, 2013 | | 2013 |
Fei LuUniversity of California RiversideVerified email at ucr.edu
