| A fast linear-arithmetic solver for DPLL (T) B Dutertre, L De Moura Computer Aided Verification: 18th International Conference, CAV 2006 …, 2006 | 940 | 2006 |
| The yices smt solver B Dutertre, L De Moura Tool paper at http://yices. csl. sri. com/tool-paper. pdf 2 (2), 1-2, 2006 | 861 | 2006 |
| Yices 2.2 B Dutertre Computer Aided Verification: 26th International Conference, CAV 2014, Held …, 2014 | 592 | 2014 |
| Using model-based intrusion detection for SCADA networks S Cheung, B Dutertre, M Fong, U Lindqvist, K Skinner, A Valdes Proceedings of the SCADA security scientific symposium 46, 1-12, 2007 | 443 | 2007 |
| Lightweight key management in wireless sensor networks by leveraging initial trust B Dutertre, S Cheung, J Levy Technical Report SRI-SDL-04-02, SRI International, 2004 | 160 | 2004 |
| Complete proof systems for first order interval temporal logic B Dutertre Proceedings of Tenth Annual IEEE Symposium on Logic in Computer Science, 36-43, 1995 | 147 | 1995 |
| A Tutorial on Satisfiability Modulo Theories: (Invited Tutorial) L de Moura, B Dutertre, N Shankar Computer Aided Verification: 19th International Conference, CAV 2007, Berlin …, 2007 | 111 | 2007 |
| Modeling and verification of a fault-tolerant real-time startup protocol using calendar automata B Dutertre, M Sorea Formal Techniques, Modelling and Analysis of Timed and Fault-Tolerant …, 2004 | 105 | 2004 |
| The Yices SMT solver, 2006 B Dutertre, L De Moura | 96 | 2006 |
| Using a PVS embedding of CSP to verify authentication protocols B Dutertre, S Schneider Theorem Proving in Higher Order Logics: 10th International Conference …, 1997 | 94 | 1997 |
| Methods and apparatus for scalable distributed management of wireless virtual private networks B Dutertre US Patent 7,246,232, 2007 | 92 | 2007 |
| Integrating simplex with DPLL (T) B Dutertre, L De Moura Computer Science Laboratory, SRI International, Tech. Rep. SRI-CSL-06-01, 2006 | 89 | 2006 |
| Elements of mathematical analysis in PVS B Dutertre Theorem Proving in Higher Order Logics: 9th International Conference, TPHOLs …, 1996 | 80 | 1996 |
| Timed systems in SAL B Dutertre, M Sorea SRI Int., Menlo Park, CA, USA, Tech. Rep. SRI-SDL-04-03, 2004 | 74 | 2004 |
| An architecture for an adaptive intrusion-tolerant server A Valdes, M Almgren, S Cheung, Y Deswarte, B Dutertre, J Levy, H Saidi, ... Security Protocols: 10th International Workshop, Cambridge, UK, April 17-19 …, 2004 | 74 | 2004 |
| Formal requirements analysis of an avionics control system B Dutertre, V Stavridou IEEE Transactions on Software Engineering 23 (5), 267-278, 1997 | 74 | 1997 |
| Intrusion tolerant software architectures V Stavridou, B Dutertre, RA Riemenschneider, H Saidi Proceedings DARPA Information Survivability Conference and Exposition II …, 2001 | 66 | 2001 |
| Intrusion tolerant software architectures V Stavridou, B Dutertre, RA Riemenschneider, H Saidi Proceedings DARPA Information Survivability Conference and Exposition II …, 2001 | 66 | 2001 |
| Property-directed k-induction D Jovanović, B Dutertre 2016 Formal Methods in Computer-Aided Design (FMCAD), 85-92, 2016 | 59 | 2016 |
| Safety envelope for security A Tiwari, B Dutertre, D Jovanović, T de Candia, PD Lincoln, J Rushby, ... Proceedings of the 3rd international conference on High confidence networked …, 2014 | 58 | 2014 |
Leonardo de MouraSenior Principal Researcher at Microsoftmicrosoft.com의 이메일 확인됨
