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Byung-Hyun Lee
Byung-Hyun Lee
principal Engineer of Samsung Electronics & Ph. D. at KAIST
Verified email at samsung.com - Homepage
Title
Cited by
Cited by
Year
Direct observation of a carbon filament in water-resistant organic memory
BH Lee, H Bae, H Seong, DI Lee, H Park, YJ Choi, SG Im, SO Kim, ...
ACS nano 9 (7), 7306-7313, 2015
982015
Comprehensive Analysis of Gate-Induced Drain Leakage in Vertically Stacked Nanowire FETs: Inversion-mode vs. Junctionless-mode
J Hur, BH Lee, MH Kang, D Ahn, T Bang, S Jeon, YK Choi
IEEE Electron Device Letters 37 (5), 541-544, 2016
802016
A Vertically Integrated Junctionless Nanowire Transistor
BH Lee, J Hur, MH Kang, T Bang, DC Ahn, D Lee, KH Kim, YK Choi
Nano Letters 16 (3), 1840-1847, 2016
752016
Vertically integrated multiple nanowire field effect transistor
BH Lee, MH Kang, DC Ahn, JY Park, T Bang, SB Jeon, J Hur, D Lee, ...
Nano Letters 15 (12), 8056-8061, 2015
702015
Foldable and disposable memory on paper
BH Lee, DI Lee, H Bae, H Seong, SB Jeon, ML Seol, JW Han, ...
Scientific Reports 6 (1), 38389, 2016
462016
Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric
D Lee, J Yoon, J Lee, BH Lee, ML Seol, H Bae, SB Jeon, H Seong, SG Im, ...
Scientific reports 6 (1), 26121, 2016
412016
Nanoscale FET-based transduction toward sensitive extended-gate biosensors
J Kwon, BH Lee, SY Kim, JY Park, H Bae, YK Choi, JH Ahn
ACS sensors 4 (6), 1724-1729, 2019
332019
Investigation of self-heating effects in gate-all-around MOSFETs with vertically stacked multiple silicon nanowire channels
JY Park, BH Lee, KS Chang, DU Kim, C Jeong, CK Kim, H Bae, YK Choi
IEEE Transactions on Electron Devices 64 (11), 4393-4399, 2017
332017
Low-frequency noise characteristics in SONOS flash memory with vertically stacked nanowire FETs
T Bang, BH Lee, CK Kim, DC Ahn, SB Jeon, MH Kang, JS Oh, YK Choi
IEEE Electron Device Letters 38 (1), 40-43, 2016
252016
A comparative study on hot-carrier injection in 5-story vertically integrated inversion-mode and junctionless-mode gate-all-around MOSFETs
SY Kim, BH Lee, J Hur, JY Park, SB Jeon, SW Lee, YK Choi
IEEE Electron Device Letters 39 (1), 4-7, 2017
222017
Three-dimensional fin-structured semiconducting carbon nanotube network transistor
D Lee, BH Lee, J Yoon, DC Ahn, JY Park, J Hur, MS Kim, SB Jeon, ...
ACS nano 10 (12), 10894-10900, 2016
222016
Electro-Thermal Local Annealing for Repair of Total Ionzing Dose Induced Damages in Gate-All-Around MOSFETs
JY Park, DI Moon, H Bae, YT Roh, ML Seol, BH Lee, HC Lee, YK Choi
IEEE Electron Device Letters 37 (7), 843-846, 2016
22*2016
Quantitative analysis of high-pressure deuterium annealing effects on vertically stacked gate-all-around SONOS memory
JM Yu, JY Park, TJ Yoo, JK Han, DH Yun, GB Lee, J Hur, BH Lee, SY Kim, ...
IEEE Transactions on Electron Devices 67 (9), 3903-3907, 2020
172020
Vertically Integrated Nanowire-Based Unified Memory
BH Lee, DC Aan, MH Kang, SB Jeon, YK Choi
Nano Letters 16 (6), 5909-5916, 2016
162016
Controlled Anisotropic Wetting of Scalloped Silicon Nanogroove
GH Kim, BH Lee, H Im, SB Jeon, D Kim, ML Seol, H Hwang, YK Choi
RSC Advances 6, 41914-41918, 2016
162016
Multi bit capacitorless DRAM and manufacturing method thereof
YK Choi, JY Park, BH Lee
US Patent 9,728,539, 2017
152017
A mechanical and electrical transistor structure (METS) with a sub-2 nm nanogap for effective voltage scaling
BH Lee, DI Moon, HJ Jang, CH Kim, ML Seol, JM Choi, DI Lee, MW Kim, ...
Nanoscale 6 (14), 7799-7804, 2014
142014
Self-powered data erasing of nanoscale flash memory by triboelectricity
IK Jin, JY Park, BH Lee, SB Jeon, IW Tcho, SJ Park, WG Kim, JK Han, ...
Nano energy 52, 63-70, 2018
132018
Ultra-Fast Erase Method of SONOS Flash Memory by Instantaneous Thermal Excitation
DC Ahn, ML Seol, J Hur, DI Moon, BH Lee, JW Han, SBJ Jun-Young Park, ...
IEEE Electron Device Letters 37 (2), 190 - 192, 2015
92015
Localized electrothermal annealing with nanowatt power for a silicon nanowire field-effect transistor
JY Park, BH Lee, GB Lee, H Bae, YK Choi
ACS applied materials & interfaces 10 (5), 4838-4843, 2018
72018
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