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Marc Loinaz
Marc Loinaz
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Verified email at stanfordalumni.org
Title
Cited by
Cited by
Year
Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits
DK Su, MJ Loinaz, S Masui, BA Wooley
IEICE transactions on electronics 76 (5), 760-770, 1993
8611993
A 200-mW, 3.3-V, CMOS color camera IC producing 352/spl times/288 24-b video at 30 frames/s
MJ Loinaz, KJ Singh, AJ Blanksby, DA Inglis, K Azadet, BD Ackland
IEEE Journal of Solid-State Circuits 33 (12), 2092-2103, 1998
1481998
Analog-to-digital converter having voltage to-time converter and time digitizer, and method for using same
SM Dacy, MJ Loinaz
US Patent 6,346,907, 2002
1292002
Performance analysis of a color CMOS photogate image sensor
AJ Blanksby, MJ Loinaz
IEEE Transactions on Electron Devices 47 (1), 55-64, 2000
1202000
Methods and apparatus for generating multiple clocks using feedback interpolation
S Sidiropoulos, M Loinaz, RS Narayanaswami, N Acharya, D Liu
US Patent 7,323,916, 2008
872008
Systems, circuits, and methods for a sigma-delta based time to digital converter
P Nikaeen, S Sidiropoulos, MJ Loinaz
US Patent 8,618,967, 2013
562013
A 10-Gb/s 16: 1 multiplexer and 10-GHz clock synthesizer in 0.25-/spl mu/m SiGe BiCMOS
HI Cong, SM Logan, MJ Loinaz, KJ O'Brien, EE Perry, GD Polhemus, ...
IEEE Journal of Solid-State Circuits 36 (12), 1946-1953, 2001
542001
Noise performance of a color CMOS photogate image sensor
AJ Blanksby, MJ Loinaz, DA Inglis, BD Ackland
International Electron Devices Meeting. IEDM Technical Digest, 205-208, 1997
531997
Methods and apparatus for clock and data recovery using a single source
S Sidiropoulos, MJ Loinaz
US Patent 7,532,697, 2009
522009
Design and fabrication of VLSI components for a general purpose analog neural computer
P Mueller, J Van der Spiegel, D Blackman, T Chiu, T Clare, C Donham, ...
Analog VLSI implementation of neural systems, 135-169, 1989
381989
A CMOS multichannel IC for pulse timing measurements with 1-mV sensitivity
MJ Loinaz, BA Wooley
IEEE Journal of Solid-State Circuits 30 (12), 1339-1349, 1995
341995
Loss-of-signal detector for clock/data recovery circuits
MJ Loinaz, GD Polhemus
US Patent 6,377,082, 2002
332002
Methods and apparatus for frequency synthesis with feedback interpolation
S Sidiropoulos, M Loinaz, RS Narayanaswami, N Acharya, D Liu
US Patent 8,433,018, 2013
312013
Experimental results and modeling techniques for switching noise in mixed-signal integrated circuits
MJ Loinaz, DK Su, BA Wooley
1992 Symposium on VLSI Circuits Digest of Technical Papers, 40-41, 1992
301992
An integrated VCSEL driver for 10Gb ethernet in 0.13/spl mu/m CMOS
S Rabii, N Acharya, P Chau, J Dao, A Feldman, HJ Liaw, D Liu, M Loinaz, ...
2006 IEEE International Solid State Circuits Conference-Digest of Technical …, 2006
282006
Methods and apparatus for minimizing jitter in a clock synthesis circuit that uses feedback interpolation
S Sidiropoulos, M Loinaz, RS Narayanaswami, N Acharya, D Liu
US Patent 7,436,229, 2008
232008
An 800 mW 10 Gb Ethernet transceiver in 0.13/spl mu/m CMOS
S Sidiropoulos, N Acharya, P Chau, J Dao, A Feldman, HJ Liaw, M Loinaz, ...
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004
232004
Digital linear voltage regulator
S Verma, M Loinaz
US Patent 7,679,345, 2010
212010
Methods and apparatus for frequency synthesis with feedback interpolation
S Sidiropoulos, M Loinaz, RS Narayanaswami, N Acharya, D Liu
US Patent 7,432,750, 2008
192008
Low power serial link
M Loinaz
US Patent 8,000,412, 2011
172011
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