The Hamiltonian-based odd–even turn model for maximally adaptive routing in 2D mesh networks-on-chip P Bahrebar, D Stroobandt Computers & Electrical Engineering 45, 386-401, 2015 | 40 | 2015 |
Simple Exact Algorithm for Transistor Sizing of Low‐Power High‐Speed Arithmetic Circuits T Nikoubin, P Bahrebar, S Pouri, K Navi, V Iravani VLSI Design 2010 (1), 264390, 2010 | 32 | 2010 |
Improving hamiltonian-based routing methods for on-chip networks: a turn model approach P Bahrebar, D Stroobandt 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-4, 2014 | 20 | 2014 |
Adaptive and reconfigurable fault-tolerant routing method for 2D Networks-on-Chip P Bahrebar, D Stroobandt 2014 International Conference on ReConFigurable Computing and FPGAs …, 2014 | 10 | 2014 |
The Hamiltonian-based odd-even turn model for adaptive routing in interconnection networks P Bahrebar, D Stroobandt 2013 International Conference on Reconfigurable Computing and FPGAs …, 2013 | 10 | 2013 |
Adaptive multicast routing method for 3D mesh-based Networks-on-Chip P Bahrebar, A Jalalvand, D Stroobandt 2014 27th IEEE International System-on-Chip Conference (SOCC), 70-75, 2014 | 8 | 2014 |
A new transistor sizing algorithm for balanced XOR/XNOR circuits T Nikoubin, S Pouri, P Bahrebar, K Navi Proceedings of the 12th Annual International CSI Computer Conference, 2006 | 7 | 2006 |
Adaptive routing in MPSoCs using an efficient path-based method P Bahrebar, D Stroobandt 2013 International SoC Design Conference (ISOCC), 031-034, 2013 | 6 | 2013 |
Abacus turn model-based routing for NoC interconnects with switch or link failures P Bahrebar, D Stroobandt Microprocessors and Microsystems 59, 69-91, 2018 | 5 | 2018 |
Dynamically reconfigurable architecture for fault-tolerant 2D Networks-on-Chip P Bahrebar, A Jalalvand, D Stroobandt 2017 26th International Conference on Computer Communication and Networks …, 2017 | 4 | 2017 |
Hamiltonian path strategy for deadlock-free and adaptive routing in diametrical 2D mesh NoCs P Bahrebar, D Stroobandt 2015 15th IEEE/ACM International Symposium on Cluster, Cloud and Grid …, 2015 | 4 | 2015 |
The hamiltonian-based odd-even routing method for 3d networks-on-chip P Bahrebar, D Stroobandt 2014 IX Southern Conference on Programmable Logic (SPL), 1-6, 2014 | 4 | 2014 |
Characterizing traffic locality in 3D NoC-based CMPs using a path-based partitioning method P Bahrebar, D Stroobandt 2014 IEEE 22nd Annual Symposium on High-Performance Interconnects, 63-70, 2014 | 4 | 2014 |
3D MAX: A maximally adaptive routing method for VC-less 3D mesh-based Networks-on-Chip P Bahrebar, D Stroobandt 2018 11th International Workshop on Network on Chip Architectures (NoCArc), 1-6, 2018 | 3 | 2018 |
Traffic-aware reconfigurable architecture for fault-tolerant 2D mesh NoCs P Bahrebar, D Stroobandt ACM SIGBED Review 15 (3), 25-30, 2018 | 3 | 2018 |
Online reconfigurable routing method for handling link failures in NoC-based MPSoCs P Bahrebar, D Stroobandt 2016 11th International Symposium on Reconfigurable Communication-centric …, 2016 | 3 | 2016 |
cREAtIve: reconfigurable embedded artificial intelligence P Bahrebar, L Denis, M Bonnaerens, K Coddens, J Dambre, W Favoreel, ... Proceedings of the 18th ACM International Conference on Computing Frontiers …, 2021 | 2 | 2021 |
3D NoC emulation model on a single FPGA J D'Hoore, P Bahrebar, D Stroobandt Proceedings of the Workshop on System-Level Interconnect: Problems and …, 2020 | 2 | 2020 |
Adaptive routing methods for on-chip interconnection networks P Bahrebar Ghent University, 2017 | 2 | 2017 |
Adaptive and reconfigurable bubble routing technique for 2D Torus interconnection networks P Bahrebar, D Stroobandt 2017 12th International Symposium on Reconfigurable Communication-centric …, 2017 | 1 | 2017 |