| Accuracy-configurable adder for approximate arithmetic designs AB Kahng, S Kang Proceedings of the 49th annual design automation conference, 820-825, 2012 | 591 | 2012 |
| Slack redistribution for graceful degradation under voltage overscaling AB Kahng, S Kang, R Kumar, J Sartori 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 825-831, 2010 | 223 | 2010 |
| Designing a processor from the ground up to allow voltage/reliability tradeoffs AB Kahng, S Kang, R Kumar, J Sartori HPCA-16 2010 The Sixteenth International Symposium on High-Performance …, 2010 | 140 | 2010 |
| A logic synthesis methodology for low-power ternary logic circuits S Kim, SY Lee, S Park, KR Kim, S Kang IEEE Transactions on Circuits and Systems I: Regular Papers 67 (9), 3138-3151, 2020 | 88 | 2020 |
| Statistical analysis and modeling for error composition in approximate computation circuits WTJ Chan, AB Kahng, S Kang, R Kumar, J Sartori 2013 IEEE 31st international conference on computer design (ICCD), 47-53, 2013 | 81 | 2013 |
| Sensitivity-guided metaheuristics for accurate discrete gate sizing J Hu, AB Kahng, SH Kang, MC Kim, IL Markov Proceedings of the International Conference on Computer-Aided Design, 233-239, 2012 | 80 | 2012 |
| Recovery-driven design: A power minimization methodology for error-tolerant processor modules AB Kahng, S Kang, R Kumar, J Sartori Proceedings of the 47th Design Automation Conference, 825-830, 2010 | 65 | 2010 |
| Learning-based approximation of interconnect delay and slew in signoff timing tools AB Kahng, S Kang, H Lee, S Nath, J Wadhwani 2013 ACM/IEEE International Workshop on System Level Interconnect Prediction …, 2013 | 58 | 2013 |
| Ternary full adder using multi-threshold voltage graphene barristors S Heo, S Kim, K Kim, H Lee, SY Kim, YJ Kim, SM Kim, HI Lee, S Lee, ... IEEE Electron Device Letters 39 (12), 1948-1951, 2018 | 53 | 2018 |
| An optimal gate design for the synthesis of ternary logic circuits S Kim, T Lim, S Kang 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 476-481, 2018 | 50 | 2018 |
| Enhancing the efficiency of energy-constrained DVFS designs AB Kahng, S Kang, R Kumar, J Sartori IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (10 …, 2012 | 49 | 2012 |
| High-performance gate sizing with a signoff timer AB Kahng, S Kang, H Lee, IL Markov, P Thapar 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 450-457, 2013 | 44 | 2013 |
| A novel ternary multiplier based on ternary CMOS compact model Y Kang, J Kim, S Kim, S Shin, ES Jang, JW Jeong, KR Kim, S Kang 2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL), 25-30, 2017 | 37 | 2017 |
| MAPG: Memory access power gating K Jeong, AB Kahng, S Kang, TS Rosing, R Strong 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2012 | 35 | 2012 |
| A cryo-CMOS controller IC with fully integrated frequency generators for superconducting qubits K Kang, D Minn, S Bae, J Lee, S Bae, G Jung, S Kang, M Lee, HJ Song, ... 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 362-364, 2022 | 25 | 2022 |
| Many-core token-based adaptive power gating AB Kahng, S Kang, TS Rosing, R Strong IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 24 | 2013 |
| TAP: token-based adaptive power gating AB Kahng, S Kang, T Rosing, R Strong Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012 | 22 | 2012 |
| Active-mode leakage reduction with data-retained power gating AB Kahng, S Kang, B Park 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013 | 21 | 2013 |
| Smart non-default routing for clock power reduction AB Kahng, S Kang, H Lee Proceedings of the 50th Annual Design Automation Conference, 1-7, 2013 | 18 | 2013 |
| A 5.5 mW/channel 2-to-7 GHz frequency synthesizable qubit-controlling cryogenic pulse modulator for scalable quantum computers K Kang, BJ Kim, G Choi, SK Lee, J Choi, J Lee, S Kang, M Lee, HJ Song, ... 2021 Symposium on VLSI Circuits, 1-2, 2021 | 17 | 2021 |
Andrew B. KahngProfessor of CSE and ECE, UC San DiegoVerified email at eng.ucsd.edu
