| A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor. H Won, JY Lee, T Yoon, K Han, S Lee, J Park, H Bae IEEE Trans. on Circuits and Systems 64 (3), 664-674, 2017 | 69 | 2017 |
| A 0.87 W transceiver IC for 100 gigabit Ethernet in 40 nm CMOS H Won, T Yoon, J Han, JY Lee, JH Yoon, T Kim, JS Lee, S Lee, K Han, ... IEEE Journal of Solid-State Circuits 50 (2), 399-413, 2015 | 34 | 2015 |
| An automatic loop gain control algorithm for bang-bang CDRs SW Kwon, JY Lee, J Lee, K Han, T Kim, S Lee, JS Lee, T Yoon, H Won, ... IEEE Transactions on Circuits and Systems I: Regular Papers 62 (12), 2817-2828, 2015 | 16 | 2015 |
| Future of high-speed short-reach interconnects using clad-dielectric waveguide JY Lee, HI Song, SW Kwon, HM Bae Optical Interconnects XVII 10109, 1010903, 2017 | 15 | 2017 |
| Phase-Rotator-Based All-Digital Phase-Locked Loop for a Spread-Spectrum Clock Generator J Yang, JY Lee, SJ Lim, HM Bae IEEE Transactions on Circuits and Systems II: Express Briefs 61 (11), 880-884, 2014 | 15 | 2014 |
| Application of Kalman gain for minimum mean-squared phase-error bound in bang-bang CDRs JY Lee, HM Bae IEEE Transactions on Circuits and Systems-I-Regular Papers 59 (12), 2825, 2012 | 15 | 2012 |
| A 10-Gb/s CDR with an adaptive optimum loop-bandwidth calibrator for serial communication links JY Lee, J Yoon, HM Bae IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 61 (8), 2014 | 13 | 2014 |
| Adaptive optimum CDR bandwidth estimation by using a kalman gain extractor HM Bae, JY Lee, HS Won, JH Yoon, JH Park, TH Kim US Patent 8,938,043, 2015 | 11 | 2015 |
| A Power-and-Area Efficient Gb/s Bootstrap Transceiver in 40 nm CMOS for Referenceless and Lane-Independent Operation JY Lee, K Han, T Yoon, T Kim, SE Lee, JS Lee, J Park, HM Bae IEEE Journal of Solid-State Circuits 51 (10), 2475-2484, 2016 | 8 | 2016 |
| A -Gb/s Referenceless-and-Masterless Phase Rotator-Based Parallel Transceiver in 90-nm CMOS JY Lee, J Yang, JH Yoon, SW Kwon, H Won, J Han, HM Bae IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (6 …, 2016 | 6 | 2016 |
| Low-power highly-accurate passive multiphase clock generation scheme by using polyphase filters HM Bae, HS Won, JY Lee, JH Park, TH Kim US Patent 8,774,336, 2014 | 6 | 2014 |
| A 14-Gb/s clad dielectric waveguide link using 73GHz carrier frequency with a stochastic RF phase synchronization system in 40nm CMOS JY Lee, H Won, HI Song, H Choi, B Kim, S Jeon, HM Bae, J Park | 6* | |
| Microstrip circuit and apparatus for chip-to-chip interface comprising the same HM Bae, II Ha, JIN Huxian, JY Lee, HS Won, TH Yoon US Patent App. 15/342,551, 2017 | 5 | 2017 |
| 8.1 A 6Gb/s transceiver with a nonlinear electronic dispersion compensator for directly modulated distributed-feedback lasers K Kwon, J Yoon, SW Kwon, J Yang, JY Lee, H Won, HM Bae Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 …, 2014 | 5 | 2014 |
| Referenceless and masterless global clock generator with a phase rotator-based parallel clock data recovery HM Bae, LEE Joon-Yeong US Patent 9,768,789, 2017 | 3 | 2017 |
| Internal jitter tolerance tester with an internal jitter generator BAE Hyunmin, JY Lee, JH Park, TH Kim US Patent 9,065,653, 2015 | 3 | 2015 |
| A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10-and 40-GbE standards T Yoon, JY Lee, K Han, J Lee, S Lee, T Kim, H Won, J Park, HM Bae VLSI Circuits (VLSI Circuits), 2015 Symposium on, C212-C213, 2015 | 2 | 2015 |
| A 103.125-Gb/s Reverse Gearbox IC in 40-nm CMOS for Supporting Legacy 10-and 40-GbE Links T Yoon, JY Lee, J Lee, K Han, JS Lee, S Lee, T Kim, J Han, H Won, J Park, ... IEEE Journal of Solid-State Circuits 52 (3), 688-703, 2017 | 1 | 2017 |
| Low-power and all-digital phase interpolator-based clock and data recovery architecture HM Bae, TH Yoon, JY Lee US Patent 9,166,605, 2015 | 1 | 2015 |
| A Phase Rotator Based All Digital PLL for Spread Spectrum Clock Generator J Yang, JY Lee, SJ Lim, JH Yoon, H Won, HM Bae | | |
