Networks on chips: structure and design methodologies WC Tsai, YC Lan, YH Hu, SJ Chen Journal of Electrical and Computer Engineering 2012, 2, 2012 | 111 | 2012 |
A fault-tolerant NoC scheme using bidirectional channel WC Tsai, DY Zheng, SJ Chen, YH Hu Proceedings of the 48th Design Automation Conference, 918-923, 2011 | 83 | 2011 |
Reconfigurable networks-on-chip SJ Chen, YC Lan, WC Tsai, YH Hu Springer Science & Business Media, 2011 | 21 | 2011 |
Reconfigurable Networks-on-Chip SJ Chen, YC Lan, WC Tsai, YH Hu Springer Science & Business Media, 2011 | 21 | 2011 |
QoS aware BiNoC architecture SH Lo, YC Lan, HH Yeh, WC Tsai, YH Hu, SJ Chen Parallel & Distributed Processing (IPDPS), 2010 IEEE International Symposium …, 2010 | 20 | 2010 |
Non-minimal, turn-model based NoC routing WC Tsai, KC Chu, YH Hu, SJ Chen Microprocessors and Microsystems 37 (8), 899-914, 2013 | 14 | 2013 |
TM-FAR: turn-model based fully adaptive routing for networks on chip WC Tsai, KC Chu, SJ Chen, YH Hu VLSI System on Chip Conference (VLSI-SoC), 2010 18th IEEE/IFIP, 19-24, 2010 | 9 | 2010 |
A scalable and fault-tolerant network routing scheme for many-core and multi-chip systems WC Tsai, KC Chu, YH Hu, SJ Chen Journal of Parallel and Distributed Computing 72 (11), 1433-1441, 2012 | 7 | 2012 |
A novel flow fluidity meter for BiNoC bandwidth resource allocation WC Tsai, HE Lin, YC Lan, SJ Chen, YH Hu System-on-Chip Conference (SOCC), 2015 28th IEEE International, 281-286, 2015 | 3 | 2015 |
3D Bidirectional-Channel Routing Algorithm for Network-Based Many-Core Embedded Systems WC Tsai, YY Weng, CJ Wei, SJ Chen, YH Hu Advanced Technologies, Embedded and Multimedia for Human-centric Computing …, 2014 | 3 | 2014 |
DyML: Dynamic Multi-Level flow control for Networks on Chip WC Tsai, YC Lan, SJ Chen, YH Hu SOC Conference (SOCC), 2010 IEEE International, 429-434, 2010 | 2 | 2010 |
An uplink scheduling mechanism based on user satisfaction in LTE networks KC Chu, TC Huang, SH Cheng, WC Tsai Electronics, Communications and Networks IV: Proceedings of the 4th …, 2015 | 1 | 2015 |
Bi-routing: a 3D bidirectional-channel routing algorithm for network-based many-core embedded systems WC Tsai, YYWCJ Wei, SJ Chen, YH Hu J. Comput.(JOC) 25 (1), 2-11, 2014 | 1 | 2014 |
A Configurable Networks-on-Chip Router Using Altera FPGA and NIOS2 Embedded Processor WC Tsai, YJ Shih, BS Lyu International Conference on Advanced Information Technologies, Taichung, Taiwan, 2014 | 1 | 2014 |
Novel time-multiplexing bidirectional on-chip network CJ Wei, YY Weng, WC Tsai, SJ Chen, YH Hu SOC Conference (SOCC), 2013 IEEE 26th International, 210-215, 2013 | 1 | 2013 |
A unified link-layer fault-tolerant architecture for network-based many-core embedded systems WC Tsai, DY Zheng, YH Hu, SJ Chen Journal of Systems Architecture 59 (7), 492-504, 2013 | 1 | 2013 |
Analysis of the relationship between the radial pulse and photoplethysmography based on the spring constant method CC Wei, WC Tsai Artery Research 6 (4), 177, 2012 | 1 | 2012 |
Preliminaries SJ Chen, YC Lan, WC Tsai, YH Hu Reconfigurable Networks-on-Chip, 15-31, 2012 | 1* | 2012 |
Fault Tolerance in BiNoC SJ Chen, YC Lan, WC Tsai, YH Hu Reconfigurable Networks-on-Chip, 157-171, 2012 | 1 | 2012 |
A BiNoC architecture—aware task allocation and communication scheduling scheme WC Tsai, WD Chen, YC Lan, YH Hu, SJ Chen Microprocessors and Microsystems 42, 215-226, 2016 | | 2016 |