| Simplifying deep neural networks for neuromorphic architectures J Chung, T Shin Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 44 | 2016 |
| Testability driven statistical path selection J Chung, J Xiong, V Zolotov, J Abraham Proceedings of the 48th Design Automation Conference, 417-422, 2011 | 40 | 2011 |
| A built-in repair analyzer with optimal repair rate for word-oriented memories J Chung, J Park, JA Abraham IEEE transactions on very large scale integration (VLSI) systems 21 (2), 281-291, 2012 | 19 | 2012 |
| ER-TCAM: A soft-error-resilient SRAM-based ternary content-addressable memory for FPGAs I Ullah, JS Yang, J Chung IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (4 …, 2020 | 18 | 2020 |
| Insight: A neuromorphic computing system for evaluation of large neural networks J Chung, T Shin, Y Kang arXiv preprint arXiv:1508.01008, 2015 | 17 | 2015 |
| Training multi-bit quantized and binarized networks with a learnable symmetric quantizer P Pham, JA Abraham, J Chung IEEE Access 9, 47194-47203, 2021 | 14 | 2021 |
| DeepRT: predictable deep learning inference for cyber-physical systems W Kang, J Chung Real-Time Systems 55 (1), 106-135, 2019 | 14 | 2019 |
| Bit-width optimization by divide-and-conquer for fixed-point digital signal processing systems J Chung, LW Kim IEEE Transactions on Computers 64 (11), 3091-3101, 2015 | 14 | 2015 |
| Factored radix-8 systolic array for tensor processing I Ullah, K Inayat, JS Yang, J Chung 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 13 | 2020 |
| Path criticality computation in parameterized statistical timing analysis using a novel operator J Chung, J Xiong, V Zolotov, JA Abraham IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 13 | 2012 |
| Post-silicon timing validation method using path delay measurements EJ Jang, J Chung, A Gattiker, S Nassif, JA Abraham 2011 Asian Test Symposium, 232-237, 2011 | 13 | 2011 |
| Energy-efficient response time management for embedded databases W Kang, J Chung Real-Time Systems 53, 228-253, 2017 | 12 | 2017 |
| Lfsr-based performance characterization of nonlinear analog and mixed-signal circuits J Park, J Chung, JA Abraham 2009 Asian Test Symposium, 373-378, 2009 | 12 | 2009 |
| At-speed test of high-speed dut using built-off test interface J Park, JW Lee, J Chung, K Han, JA Abraham, E Byun, CJ Woo, S Oh 2010 19th IEEE Asian Test Symposium, 269-274, 2010 | 11 | 2010 |
| QoS management for embedded databases in multicore-based embedded systems W Kang, J Chung Mobile Information Systems 2015, 2015 | 10 | 2015 |
| Concurrent path selection algorithm in statistical timing analysis J Chung, JA Abraham IEEE transactions on very large scale integration (VLSI) systems 21 (9 …, 2012 | 10 | 2012 |
| Delay defect diagnosis methodology using path delay measurements EJ Jang, J Chung, JA Abraham 2011 International Symposium on Integrated Circuits, 317-320, 2011 | 10 | 2011 |
| Recursive path selection for delay fault testing J Chung, JA Abraham 2009 27th IEEE VLSI Test Symposium, 65-70, 2009 | 10 | 2009 |
| Hybrid accumulator factored systolic array for machine learning acceleration K Inayat, J Chung IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (7), 881-892, 2022 | 9 | 2022 |
| Power-and time-aware deep learning inference for mobile embedded devices W Kang, J Chung IEEE Access 7, 3778-3789, 2018 | 9 | 2018 |
